Datasheet

LPC11E6X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 1.2 — 21 May 2014 2 of 89
NXP Semiconductors
LPC11E6x
32-bit ARM Cortex-M0+ microcontroller
 32-bit integer division routines.
 Digital peripherals:
 Simple DMA engine with 16 channels and programmable input triggers.
 High-speed GPIO interface connected to the ARM Cortex-M0+ IO bus with up to 80
General-Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors,
programmable open-drain mode, input inverter, and programmable glitch filter and
digital filter.
 Pin interrupt and pattern match engine using eight selectable GPIO pins.
 Two GPIO group interrupt generators.
 CRC engine.
 Configurable PWM/timer subsystem (two 16-bit and two 32-bit standard
counter/timers, two State-Configurable Timers (SCTimer/PWM)) that provides:
 Up to four 32-bit and two 16-bit counter/timers or two 32-bit and six 16-bit
counter/timers.
 Up to 21 match outputs and 16 capture inputs.
 Up to 19 PWM outputs with 6 independent time bases.
 Windowed WatchDog timer (WWDT).
 Real-time Clock (RTC) in the always-on power domain with separate battery supply
pin and 32 kHz oscillator.
 Analog peripherals:
 One 12-bit ADC with up to 12 input channels with multiple internal and external
trigger inputs and with sample rates of up to 2 Msamples/s. The ADC supports two
independent conversion sequences.
 Temperature sensor.
 Serial interfaces:
 Up to five USART interfaces, all with DMA, synchronous mode, and RS-485 mode
support. Four USARTs use a shared fractional baud generator.
 Two SSP controllers with DMA support.
 Two I
2
C-bus interfaces. One I
2
C-bus interface with specialized open-drain pins
supports I2C Fast-mode Plus.
 Clock generation:
 12 MHz internal RC oscillator trimmed to 1 % accuracy for 25 C  T
amb
 +85 C
that can optionally be used as a system clock.
 On-chip 32 kHz oscillator for RTC.
 Crystal oscillator with an operating range of 1 MHz to 25 MHz. Oscillator pins are
shared with the GPIO pins.
 Programmable watchdog oscillator with a frequency range of 9.4 kHz to 2.3 MHz.
 PLL allows CPU operation up to the maximum CPU rate without the need for a
high-frequency crystal.
 Clock output function with divider that can reflect the crystal oscillator, the main
clock, the IRC, or the watchdog oscillator.
 Power control:
 Integrated PMU (Power Management Unit) to minimize power consumption.
 Reduced power modes: Sleep mode, Deep-sleep mode, Power-down mode, and
Deep power-down mode.
 Wake-up from Deep-sleep and Power-down modes on external pin inputs and
USART activity.