Datasheet

LPC11E6X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 1.2 — 21 May 2014 16 of 89
NXP Semiconductors
LPC11E6x
32-bit ARM Cortex-M0+ microcontroller
PIO2_15 -3249
[6]
I; PU IO PIO2_15 — General-purpose digital input/output pin.
I SCT1_IN3 — SCTimer1/PWM input 3.
PIO2_16 --50
[6]
I; PU IO PIO2_16 — General-purpose digital input/output pin.
O SCT1_OUT0 — SCTimer1/PWM output 0.
PIO2_17 --51
[6]
I; PU IO PIO2_17 — General-purpose digital input/output pin.
O SCT1_OUT1 — SCTimer1/PWM output 1.
PIO2_18 -3352
[6]
I; PU IO PIO2_18 — General-purpose port 2 input/output 18.
O SCT1_OUT2 — SCTimer1/PWM output 2.
PIO2_19 -3657
[6]
I; PU IO PIO2_19 — General-purpose port 2 input/output 19.
O SCT1_OUT3 — SCTimer1/PWM output 3.
PIO2_20 - - 75
[6]
I; PU IO PIO2_20 — General-purpose port 2 input/output 20.
PIO2_21 - - 76
[6]
I; PU IO PIO2_21 — General-purpose port 2 input/output 21.
PIO2_22 - - 77
[6]
I; PU IO PIO2_22 — General-purpose port 2 input/output 22.
PIO2_23 - - 1
[6]
I; PU IO PIO2_23 — General-purpose port 2 input/output 23.
RSTOUT
- - 88
[6]
IA IO Internal reset status output.
RTCXIN 48 1 5
[2]
- - RTC oscillator input. This input should be grounded if the
RTC is not used.
RTCXOUT 1 2 6
[2]
- - RTC oscillator output.
VREFP 34 47 73 - - ADC positive reference voltage. If the ADC is not used, tie
VREFP to V
DD
.
VREFN 35 48 74 - - ADC negative voltage reference. If the ADC is not used, tie
VREFN to V
SS
.
V
DDA
40 53 84 - - Analog voltage supply. V
DDA
should typically be the same
voltages as V
DD
but should be isolated to minimize noise
and error. V
DDA
should be tied to V
DD
if the ADC is not
used.
V
DD
44,
8
58,
10,
34,
59
92,
14,
71,
54,
93
- - Supply voltage to the internal regulator and the external
rail.
VBAT 47 63 99 - - Battery supply. Supplies power to the RTC. If no battery is
used, tie VBAT to VDD.
V
SSA
41 54 85 - - Analog ground. V
SSA
should typically be the same voltage
as V
SS
but should be isolated to minimize noise and error.
V
SSA
should be tied to V
SS
if the ADC is not used.
V
SS
43,
2,
5
57,
3,
7
91,
7,
11,
53,
70
- - Ground.
n.c. - - 39 Not connected.
n.c. - - 38 Not connected.
Table 3. Pin description
Pin functions are selected through the IOCON registers. See Table 2
for availability of USART4 pin functions.
Symbol
LQFP48 LQFP64 LQFP100
Reset
state
[1]
Type Description of pin functions