Datasheet

LPC11E3X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2.3 — 11 September 2014 57 of 71
NXP Semiconductors
LPC11E3x
32-bit ARM Cortex-M0 microcontroller
Under nominal operating condition V
DD
= 3.3 V and with the maximum sampling
frequency fs = 400 kHz, the parameters assume the following values:
C
ia
= 1 pF (max)
R
mux
= 2 kΩ (max)
R
sw
= 1.3 kΩ (max)
C
io
= 7.1 pF (max)
The effective input impedance with these parameters is R
in
= 308 kΩ.
11.6 ADC usage notes
The following guidelines show how to increase the performance of the ADC in a noisy
environment beyond the ADC specifications listed in Table 6
:
• The ADC input trace must be short and as close as possible to the LPC11E3x chip.
• Shield The ADC input traces from fast switching digital signals and noisy power
supply lines.
• The ADC and the digital core share the same power supply. Therefore, filter the power
supply line adequately.
• To improve the ADC performance in a noisy environment, put the device in Sleep
mode during the ADC conversion.
11.7 I/O Handler software library applications
The following sections provide application examples for the I/O Handler software library.
All library examples make use of the I/O Handler hardware to extend the functionality of
the part through software library calls. The library is available on
http://www.LPCware.com.
11.7.1 I/O Handler I
2
S
The I/O Handler software library provides functions to emulate an I
2
S master transmit
interface using the I/O Handler hardware block.
The emulated I
2
S interface loops over a 1 kB buffer, transmitting the datawords according
to the I
2
S protocol. Interrupts are generated every time when the first 512 bytes have been
transmitted and when the last 512 bytes have been transmitted. This allows the ARM core
to load the free portion of the buffer with new data, thereby enabling streaming audio.
Two channels with 16-bit per channel are supported. The code size of the software library
is 1 kB and code must be executed from the SRAM1 memory area reserved for the I/O
Handler code.
11.7.2 I/O Handler UART
The I/O Handler UART library emulates one additional full-duplex UART. The emulated
UART can be configured for 7 or 8 data bits, no parity and 1 or 2 stop bits. The baud rate
is configurable up to 115200 baud. The RXD signal is available on three I/O Handler pins
(IOH_6, IOH_16, IOH_20), while TXD and CTS are available on all 21 I/O Handler pins.
The code size of the software library is about 1.2 kB and code must be executed from the
SRAM1 memory area reserved for the I/O Handler code.