Datasheet

Product data sheet Rev. 2.3 — 11 September 2014 28 of 71

NXP Semiconductors

LPC11E3x

32-bit ARM Cortex-M0 microcontroller

• Efficiency mode corresponding to optimized balance of current consumption and CPU

performance.

• Low-current mode corresponding to lowest power consumption.

In addition, the power profile includes routines to select the optimal PLL settings for a

given system clock and PLL input clock.

7.17.5.2 Sleep mode

When Sleep mode is entered, the clock to the core is stopped. Resumption from the Sleep

mode does not need any special sequence but re-enabling the clock to the ARM core.

In Sleep mode, execution of instructions is suspended until either a reset or interrupt

occurs. Peripheral functions continue operation during Sleep mode and can generate

interrupts to cause the processor to resume execution. Sleep mode eliminates dynamic

power used by the processor itself, by memory systems and related controllers, and by

internal buses.

7.17.5.3 Deep-sleep mode

In Deep-sleep mode, the LPC11E3x is in Sleep-mode and all peripheral clocks and all

clock sources are off except for the IRC. The IRC output is disabled unless the IRC is

selected as input to the watchdog timer. In addition all analog blocks are shut down and

the flash is in stand-by mode. In Deep-sleep mode, the application can keep the watchdog

oscillator and the BOD circuit running for self-timed wake-up and BOD protection.

The LPC11E3x can wake up from Deep-sleep mode via reset, selected GPIO pins or a

watchdog timer interrupt.

Deep-sleep mode saves power and allows for short wake-up times.

7.17.5.4 Power-down mode

In Power-down mode, the LPC11E3x is in Sleep-mode and all peripheral clocks and all

clock sources are off except for watchdog oscillator if selected. In addition all analog

blocks and the flash are shut down. In Power-down mode, the application can keep the

BOD circuit running for BOD protection.

The LPC11E3x can wake up from Power-down mode via reset, selected GPIO pins or a

watchdog timer interrupt.

Power-down mode reduces power consumption compared to Deep-sleep mode at the

expense of longer wake-up times.

7.17.5.5 Deep power-down mode

In Deep power-down mode, power is shut off to the entire chip except for the WAKEUP

pin. The LPC11E3x can wake up from Deep power-down mode via the WAKEUP pin.

The LPC11E3x can be prevented from entering Deep power-down mode by setting a lock

bit in the PMU block. Locking out Deep power-down mode enables the application to keep

the watchdog timer or the BOD running at all times.

When entering Deep power-down mode, an external pull-up resistor is required on the

WAKEUP pin to hold it HIGH. Pull the RESET

pin HIGH to prevent it from floating while in

Deep power-down mode.