Datasheet

LPC11E1X All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1.1 — 24 September 2013 59 of 62
NXP Semiconductors
LPC11E1x
32-bit ARM Cortex-M0 microcontroller
15. Revision history
Table 20. Revision history
Document ID Release date Data sheet status Change notice Supersedes
LPC11E1X v.1.1 20130924 Product data sheet - LPC11E1X v.1
Modifications:
• Parameters t
er
and f
clk
removed in Tabl e 10 .
• Table 3: Added “5 V tolerant pad” to RESET/PIO0_0 table note.
• Table 7: Removed BOD interrupt level 0.
• Added Section 11.5 “ADC effective input impedance”.
• Programmable glitch filter is enabled by default. See Section 7.7.1.
• Table 5 “Static characteristics” added Pin capacitance section.
• Table 4 “Limiting values”:
– Updated V
DD
min and max.
– Updated V
I
conditions.
• Table 10 “EEPROM characteristics”: Changed the t
prog
from 1.1 ms to 2.9 ms; the
EEPROM IAP always does an erase and program, thus the total program time is t
er
+ t
prog
.
LPC11E1X v.1 20120220 Product data sheet - -