Datasheet

LPC11E1X All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1.1 — 24 September 2013 20 of 62
NXP Semiconductors
LPC11E1x
32-bit ARM Cortex-M0 microcontroller
Optional warning interrupt can be generated at a programmable time before watchdog
time-out.
Software enables the WWDT, but a hardware reset or a watchdog reset/interrupt is
required to disable the WWDT.
Incorrect feed sequence causes reset or interrupt, if enabled.
Flag to indicate watchdog reset.
Programmable 24-bit timer with internal prescaler.
Selectable time period from (T
cy(WDCLK)
256 4) to (T
cy(WDCLK)
2
24
4) in
multiples of T
cy(WDCLK)
4.
The Watchdog Clock (WDCLK) source can be selected from the IRC or the dedicated
watchdog oscillator (WDO). The clock source selection provides a wide range of
potential timing choices of watchdog operation under different power conditions.
7.16 Clocking and power control
7.16.1 Integrated oscillators
The LPC11E1x include three independent oscillators: the system oscillator, the Internal
RC oscillator (IRC), and the watchdog oscillator. Each oscillator can be used for more
than one purpose as required in a particular application.
Following reset, the LPC11E1x operates from the internal RC oscillator until software
switches to a different clock source. The IRC allows the system to operate without any
external crystal and the bootloader code to operate at a known frequency.
See Figure 6
for an overview of the LPC11E1x clock generation.