Datasheet

LPC11D14 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2 — 23 July 2012 40 of 47
NXP Semiconductors
LPC11D14
32-bit ARM Cortex-M0 microcontroller
11.5 Reset pad configuration
11.6 ElectroMagnetic Compatibility (EMC)
Radiated emission measurements according to the IEC 61967-2 standard using the
TEM-cell method are shown for the LPC1114FBD48/302 in Table 20
.
[1] IEC levels refer to Appendix D in the IEC 61967-2 Specification.
Fig 26. Reset pad configuration
V
SS
reset
002aaf274
V
DD
V
DD
V
DD
R
pu
ESD
ESD
20 ns RC
GLITCH FILTER
PIN
Table 20. ElectroMagnetic Compatibility (EMC) for part LPC1114FBD48/302 (TEM-cell
method)
V
DD
= 3.3 V; T
amb
= 25  C.
Parameter Frequency band System clock = Unit
12 MHz 24 MHz 48 MHz
Input clock: IRC (12 MHz)
maximum
peak level
150 kHz - 30 MHz 7 5 7dBV
30 MHz - 150 MHz 21 10dBV
150 MHz - 1 GHz 4 8 16 dBV
IEC level
[1]
-ONM-
Input clock: crystal oscillator (12 MHz)
maximum
peak level
150 kHz - 30 MHz 7 7 7dBV
30 MHz - 150 MHz 218dBV
150 MHz - 1 GHz 4 7 14 dBV
IEC level
[1]
-ONM-