Datasheet

LPC11D14 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2 — 23 July 2012 24 of 47
NXP Semiconductors
LPC11D14
32-bit ARM Cortex-M0 microcontroller
Conditions: V
DD
= 3.3 V; sleep mode entered from flash; all peripherals disabled in the
SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral clocks disabled; internal
pull-up resistors disabled; BOD disabled; low-current mode.
(1) System oscillator and system PLL disabled; IRC enabled.
(2) System oscillator and system PLL enabled; IRC disabled.
Fig 8. Sleep mode: Typical supply current I
DD
versus temperature for different system
clock frequencies
temperature (°C)
−40 853510 60−15
002aaf982
2
4
6
I
DD
(mA)
0
12 MHz
(1)
24 MHz
(2)
36 MHz
(2)
48 MHz
(2)