Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 100 (14x14) 32-Bit 50 MHz I/O number 42

1. General description

The LPC11D14 is a ARM Cortex-M0 based, low-cost 32-bit MCU family, designed for

8/16-bit microcontroller applications, offering performance, low power, simple instruction

set and memory addressing together with reduced code size compared to existing 8/16-bit

architectures.

The LPC11D14 is a dual-chip module consisting of a LPC1114 single-chip microcontroller

combined with a PCF8576D Universal LCD driver in a low-cost 100-pin package. The

LCD driver provides 40 segments and supports from one to four backplanes. Display

overhead is minimized by an on-chip display RAM with auto-increment addressing.

The LPC11D14 operates at CPU frequencies of up to 50 MHz.

The peripheral complement of the LPC11D14 includes 32 kB of flash memory, 8 kB of

data memory, one Fast-mode Plus I

C-bus interface, one RS-485/EIA-485 UART, up to

two SPI interfaces with SSP features, four general purpose counter/timers, a 10-bit ADC,

and up to 42 general purpose I/O pins.

Remark: For a functional description of the LPC1114 microcontroller see the

LPC1111/12/13/14 data sheet. For a detailed description of the LCD driver see the

PCF8576D data sheet. Both data sheets are available on the NXP web site.

2. Features and benefits

 LCD driver

 40 segments.

 One to four backplanes.

 On-chip display RAM with auto-increment addressing.

 System:

 ARM Cortex-M0 processor, running at frequencies of up to 50 MHz.

 ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).

 Serial Wire Debug.

 System tick timer.

 Memory:

 32 kB on-chip flash programming memory.

 8 kB SRAM.

 In-System Programming (ISP) and In-Application Programming (IAP) via on-chip

bootloader software.

LPC11D14

32-bit ARM Cortex-M0 microcontroller; 32 kB flash and 8 kB

SRAM; 40 segment x 4 LCD driver

Rev. 2 — 23 July 2012 Product data sheet

Summary of content (47 pages)

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LPC11D14 32-bit ARM Cortex-M0 microcontroller; 32 kB flash and 8 kB SRAM; 40 segment x 4 LCD driver Rev. 2 — 23 July 2012 Product data sheet 1. General description The LPC11D14 is a ARM Cortex-M0 based, low-cost 32-bit MCU family, designed for 8/16-bit microcontroller applications, offering performance, low power, simple instruction set and memory addressing together with reduced code size compared to existing 8/16-bit architectures.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller  Digital peripherals:  42 General Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors. In addition, a configurable open-drain mode is supported.  GPIO pins can be used as edge and level sensitive interrupt sources.  High-current output driver (20 mA) on one pin.  High-current sink drivers (20 mA) on two I2C-bus pins in Fast-mode Plus.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 3. Applications     Industrial applications (e.g. thermostats) White goods Human interface Sensors 4. Ordering information Table 1. Ordering information Type number Package Name Description LPC11D14FBD100/302 LQFP100 Version plastic low profile quad flat package; 100 leads; body 14  14  1.4 mm SOT407-1 4.1 Ordering options Table 2.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller XTALIN XTALOUT RESET SWD LPC1114 IRC TEST/DEBUG INTERFACE CLOCK GENERATION, POWER CONTROL, SYSTEM FUNCTIONS POR ARM CORTEX-M0 system bus clocks and controls FLASH 32 kB slave GPIO ports PIO0/1/2/3 CLKOUT SRAM 8 kB slave ROM slave slave HIGH-SPEED GPIO AHB-LITE BUS slave AHB TO APB BRIDGE RXD TXD DTR, DSR, CTS, DCD, RI, RTS CT32B0_MAT[3:0] CT32B0_CAP0 CT32B1_MAT[3:0] CT32B1_CAP0 CT16B0_MAT[2:0] CT16B0_CAP0 CT16B1_MAT[1:0] CT16
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller BP0 BP2 BP1 S0 to S39 BP3 40 VLCD DISPLAY SEGMENT OUTPUTS BACKPLANE OUTPUTS LCD VOLTAGE SELECTOR DISPLAY REGISTER OUTPUT BANK SELECT AND BLINK CONTROL DISPLAY CONTROLLER LCD BIAS GENERATOR VSS(LCD) CLK SYNC VSS(LCD) CLOCK SELECT AND TIMING OSC OSCILLATOR DISPLAY RAM 40 x 4-BIT PCF8576D BLINKER TIMEBASE POWER-ON RESET COMMAND DECODER WRITE DATA CONTROL DATA POINTER AND AUTO INCREMENT VDD(LCD) LCD_SCL LCD_SDA INPUT F
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 6. Pinning information 77 S31 76 S30 78 S32 79 S33 80 PIO2_2 81 PIO0_8 82 PIO0_9 83 SWCLK/PIO0_10 84 PIO1_10 85 PIO2_11 86 R/PIO0_11 87 R/PIO1_0 88 R/PIO1_1 89 R/PIO1_2 90 PIO3_0 91 PIO3_1 92 PIO2_3 93 SWDIO/PIO1_3 94 PIO1_4 95 VSS 96 PIO1_11 97 PIO3_2 98 VDD 99 PIO1_5 100 PIO1_6 6.1 Pinning PIO1_7 1 75 S29 PIO3_3 2 74 S28 n.c.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 6.2 Pin description Table 3. LPC11D14 pin description table (LQFP100 package) Symbol Pin Start logic input Type Reset state Description [1] Microcontroller pins PIO0_0 to PIO0_11 RESET/PIO0_0 PIO0_1/CLKOUT/ CT32B0_MAT2 PIO0_2/SSEL0/ CT16B0_CAP0 I/O 6[2] 7[3] 13[3] yes yes yes Port 0 — Port 0 is a 12-bit I/O port with individual direction and function controls for each bit.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller Table 3.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller Table 3.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller Table 3. LPC11D14 pin description table (LQFP100 package) …continued Symbol Pin Start logic input Type I/O PIO2_10 28[3] no PIO2_11/SCK0 85[3] no PIO3_0 to PIO3_5 Reset state [1] I; PU PIO2_10 — General purpose digital input/output pin. I/O I; PU PIO2_11 — General purpose digital input/output pin. I/O - SCK0 — Serial clock for SPI0.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller Table 3. LPC11D14 pin description table (LQFP100 package) …continued Symbol Pin Start logic input Type Reset state Description [1] S17 63 - O VLCD[7] LCD segment output. S18 64 - O VLCD[7] LCD segment output. S19 65 - O VLCD[7] LCD segment output. S20 66 - O VLCD[7] LCD segment output. S21 67 - O VLCD[7] LCD segment output. S22 68 - O VLCD[7] LCD segment output.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller [2] RESET functionality is not available in Deep power-down mode. Use the WAKEUP pin to reset the chip and wake up from Deep power-down mode. An external pull-up resistor is required on this pin for the Deep power-down mode. [3] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 7. Functional description 7.1 LPC1114 microcontroller See Ref. 1 for a detailed functional description of the LPC1114 microcontroller. 7.2 LCD driver See Ref. 2 for a detailed functional description of the PCF8576D LCD driver. 7.2.1 General description The PCF8576D is a peripheral device which interfaces to almost any Liquid Crystal Display (LCD) with low multiplex rates.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller Remark: Do not transfer data on the I2C-bus for at least 1 ms after a power-on to allow the reset action to complete. 7.2.4 LCD bias generator Fractional LCD biasing voltages are obtained from an internal voltage divider consisting of three impedances connected in series between VLCD and VSS(LCD). The middle resistor can be bypassed to provide a 1/2 bias voltage level for the 1:2 multiplex configuration.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller In the static drive mode the same signal is carried by all four backplane outputs and they can be connected in parallel for very high drive requirements. 7.2.10 Display RAM The display RAM is a static 40  4-bit RAM which stores LCD data. There is a one-to-one correspondence between the RAM addresses and the segment outputs, and between the individual bits of a RAM word and the backplane outputs. For details, see Ref. 2.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).[1] Symbol Parameter Conditions VDD supply voltage (core and external rail) [2] Min Max Unit 1.8 3.6 V 0.5 +5.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 9. Static characteristics Table 6. Static characteristics Tamb = 40 C to +85 C, unless otherwise specified. Symbol Parameter VDD supply voltage (core and external rail) Min Typ[1] Max Unit 1.8 3.3 3.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller Table 6. Static characteristics …continued Tamb = 40 C to +85 C, unless otherwise specified. Symbol Parameter Conditions Min Typ[1] Max Unit IOH HIGH-level output current VOH = VDD  0.4 V; 4 - - mA 3 - - mA 4 - - mA 2.5 V  VDD  3.6 V 1.8 V  VDD < 2.5 V IOL LOW-level output current VOL = 0.4 V 2.5 V  VDD  3.6 V 1.8 V  VDD < 2.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller Table 6. Static characteristics …continued Tamb = 40 C to +85 C, unless otherwise specified. Symbol Parameter Conditions Min Typ[1] Max Unit IOL LOW-level output current VOL = 0.4 V 4 - - mA 3 - - mA - - 50 mA 2.5 V  VDD  3.6 V 1.8 V  VDD < 2.5 V [14] IOLS LOW-level short-circuit output current VOL = VDD Ipd pull-down current VI = 5 V 10 50 150 A Ipu pull-up current VI = 0 V 15 50 85 A 2.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller [13] 3-state outputs go into 3-state mode in Deep power-down mode. [14] Allowed as long as the current limit does not exceed the maximum current allowed by the device. [15] To VSS. Table 7. ADC static characteristics Tamb = 40 C to +85 C unless otherwise specified; ADC frequency 4.5 MHz, VDD = 2.5 V to 3.6 V.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller offset error EO gain error EG 1023 1022 1021 1020 1019 1018 (2) 7 code out (1) 6 5 (5) 4 (4) 3 (3) 2 1 LSB (ideal) 1 0 1 2 3 4 5 6 7 1018 1019 1020 1021 1022 1023 1024 VIA (LSBideal) offset error EO 1 LSB = VDD − VSS 1024 002aaf426 (1) Example of an actual transfer curve. (2) The ideal transfer curve. (3) Differential linearity error (ED). (4) Integral non-linearity (EL(adj)).
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 9.1 BOD static characteristics Table 8. BOD static characteristics[1] Tamb = 25 C. Symbol Parameter Conditions Vth threshold voltage interrupt level 0 Min Typ Max Unit assertion - 1.65 - V de-assertion - 1.80 - V assertion - 2.22 - V de-assertion - 2.35 - V assertion - 2.52 - V de-assertion - 2.66 - V assertion - 2.80 - V de-assertion - 2.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 002aaf980 10 IDD (mA) 8 48 MHz(2) 6 36 MHz(2) 4 24 MHz(2) 12 MHz(1) 2 0 1.8 2.4 3.0 3.6 VDD (V) Conditions: Tamb = 25 C; active mode entered executing code while(1){} from flash; all peripherals disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral clocks disabled; internal pull-up resistors disabled; BOD disabled; low-current mode. (1) System oscillator and system PLL disabled; IRC enabled.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 002aaf982 6 IDD (mA) 48 MHz(2) 4 36 MHz(2) 24 MHz(2) 2 12 MHz(1) 0 −40 −15 10 35 60 85 temperature (°C) Conditions: VDD = 3.3 V; sleep mode entered from flash; all peripherals disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral clocks disabled; internal pull-up resistors disabled; BOD disabled; low-current mode. (1) System oscillator and system PLL disabled; IRC enabled.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 002aaf977 5.5 IDD (μA) 4.5 3.5 VDD = 3.3 V, 3.6 V 1.8 V 2.5 1.5 −40 −15 10 35 60 85 temperature (°C) Conditions: BOD disabled; all oscillators and analog blocks disabled in the PDSLEEPCFG register (PDSLEEPCFG = 0x0000 18FF). Fig 9. Deep-sleep mode: Typical supply current IDD versus temperature for different supply voltages VDD 002aaf978 0.8 IDD (μA) VDD = 3.6 V 3.3 V 1.8 V 0.6 0.4 0.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 9.3 Peripheral power consumption The supply current per peripheral is measured as the difference in supply current between the peripheral block enabled and the peripheral block disabled in the SYSAHBCLKCFG and PDRUNCFG (for analog blocks) registers. All other blocks are disabled in both registers and no code is executed. Measured on a typical sample at Tamb = 25 C.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 9.4 Electrical pin characteristics 002aae990 3.6 VOH (V) T = 85 °C 25 °C −40 °C 3.2 2.8 2.4 2 0 10 20 30 40 50 60 IOH (mA) Conditions: VDD = 3.3 V; on pin PIO0_7. Fig 11. High-drive output: Typical HIGH-level output voltage VOH versus HIGH-level output current IOH. 002aaf019 60 T = 85 °C 25 °C −40 °C IOL (mA) 40 20 0 0 0.2 0.4 0.6 VOL (V) Conditions: VDD = 3.3 V; on pins PIO0_4 and PIO0_5. Fig 12.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 002aae991 15 IOL (mA) T = 85 °C 25 °C −40 °C 10 5 0 0 0.2 0.4 0.6 VOL (V) Conditions: VDD = 3.3 V; standard port pins and PIO0_7. Fig 13. Typical LOW-level output current IOL versus LOW-level output voltage VOL 002aae992 3.6 VOH (V) T = 85 °C 25 °C −40 °C 3.2 2.8 2.4 2 0 8 16 24 IOH (mA) Conditions: VDD = 3.3 V; standard port pins. Fig 14.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 002aae988 10 Ipu (μA) −10 −30 T = 85 °C 25 °C −40 °C −50 −70 0 1 2 3 4 5 VI (V) Conditions: VDD = 3.3 V; standard port pins. Fig 15. Typical pull-up current Ipu versus input voltage VI 002aae989 80 T = 85 °C 25 °C −40 °C Ipd (μA) 60 40 20 0 0 1 2 3 4 5 VI (V) Conditions: VDD = 3.3 V; standard port pins. Fig 16.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 10. Dynamic characteristics 10.1 Power-up ramp conditions Table 10. Power-up characteristics Tamb = 40 C to +85 C. Symbol Parameter tr rise time twait wait time VI input voltage Conditions Min at t = t1: 0 < VI 400 mV [1] [1][2] at t = t1 on pin VDD Typ Max Unit 0 - 500 ms 12 - - s 0 - 400 mV [1] See Figure 17.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 10.3 External clock Table 12. Dynamic characteristic: external clock Tamb = 40 C to +85 C; VDD over specified ranges.[1] Min Typ[2] Max Unit oscillator frequency 1 - 25 MHz Symbol Parameter fosc Conditions Tcy(clk) clock cycle time 40 - 1000 ns tCHCX clock HIGH time Tcy(clk)  0.4 - - ns tCLCX clock LOW time Tcy(clk)  0.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 10.4 Internal oscillators Table 13. Dynamic characteristic: internal oscillators Tamb = 40 C to +85 C; 2.7 V  VDD  3.6 V.[1] Symbol Parameter Conditions fosc(RC) internal RC oscillator frequency - Min Typ[2] Max Unit 11.88 12 12.12 MHz [1] Parameters are valid over operating temperature range unless otherwise specified. [2] Typical ratings are not guaranteed.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 10.5 I/O pins Table 15. Dynamic characteristic: I/O pins[1] Tamb = 40 C to +85 C; 3.0 V  VDD  3.6 V. Symbol Parameter Conditions Min Typ Max Unit tr rise time pin configured as output 3.0 - 5.0 ns tf fall time pin configured as output 2.5 - 5.0 ns [1] Applies to standard port pins and RESET pin. 10.6 I2C-bus Table 16. Dynamic characteristic: I2C-bus pins[1] Tamb = 40 C to +85 C.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller [6] The maximum tf for the SDA and SCL bus lines is specified at 300 ns. The maximum fall time for the SDA output stage tf is specified at 250 ns. This allows series protection resistors to be connected in between the SDA and the SCL pins and the SDA/SCL bus lines without exceeding the maximum specified tf. [7] In Fast-mode Plus, fall time is specified the same for both output stage and bus timing.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller Table 17.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller Tcy(clk) tclk(H) tclk(L) tDS tDH SCK (CPOL = 0) SCK (CPOL = 1) MOSI DATA VALID DATA VALID tv(Q) MISO th(Q) DATA VALID tDS MOSI DATA VALID tDH DATA VALID tv(Q) MISO DATA VALID CPHA = 1 DATA VALID th(Q) CPHA = 0 DATA VALID 002aae830 Pin names SCK, MISO, and MOSI refer to pins for both SPI peripherals, SPI0 and SPI1. Fig 22.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 11. Application information 11.1 ADC usage notes The following guidelines show how to increase the performance of the ADC in a noisy environment beyond the ADC specifications listed in Table 7: • The ADC input trace must be short and as close as possible to the LPC11D14 chip. • The ADC input traces must be shielded from fast switching digital signals and noisy power supply lines.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller LPC1xxx L XTALIN XTALOUT = CL CP XTAL RS CX2 CX1 002aaf424 Fig 24. Oscillator modes and models: oscillation mode of operation and external crystal model used for CX1/CX2 evaluation Table 18.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller order to keep the noise coupled in via the PCB as small as possible. Also parasitics should stay as small as possible. Values of CX1 and CX2 should be chosen smaller accordingly to the increase in parasitics of the PCB layout. 11.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 11.5 Reset pad configuration VDD VDD VDD Rpu ESD 20 ns RC GLITCH FILTER reset PIN ESD VSS 002aaf274 Fig 26. Reset pad configuration 11.6 ElectroMagnetic Compatibility (EMC) Radiated emission measurements according to the IEC 61967-2 standard using the TEM-cell method are shown for the LPC1114FBD48/302 in Table 20. Table 20. ElectroMagnetic Compatibility (EMC) for part LPC1114FBD48/302 (TEM-cell method) VDD = 3.3 V; Tamb = 25 C.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 12. Package outline LQFP100: plastic low profile quad flat package; 100 leads; body 14 x 14 x 1.4 mm SOT407-1 c y X A 51 75 50 76 ZE e E HE A A2 (A 3) A1 w M θ bp Lp pin 1 index L 100 detail X 26 1 25 ZD e v M A w M bp D B HD v M B 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e mm 1.6 0.15 0.05 1.45 1.35 0.25 0.27 0.17 0.20 0.09 14.1 13.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 13. Soldering Footprint information for reflow soldering of LQFP100 package SOT407-1 Hx Gx P2 Hy (0.125) P1 Gy By Ay C D2 (8×) D1 Bx Ax Generic footprint pattern Refer to the package outline drawing for actual layout solder land occupied area DIMENSIONS in mm P1 0.500 P2 Ax Ay Bx By 0.560 17.300 17.300 14.300 14.300 C D1 D2 1.500 0.280 0.400 Gx Gy Hx Hy 14.500 14.500 17.550 17.550 sot407-1 Fig 28.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 14. Abbreviations Table 21.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 16. Revision history Table 22. Revision history Document ID Release date Data sheet status Change notice Supersedes LPC11D14 v.2 20120723 Product data sheet - LPC11D14 v.1 Modifications: LPC11D14 v.1 LPC11D14 Product data sheet • • • • • Figure 3 updated. • For parameters IOL, VOL, IOH, VOH, changed conditions to 1.8 V  VDD < 2.5 V and 2.5 V  VDD  3.6 V in Table 6.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 17. Legal information 17.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use.
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LPC11D14 NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 19. Contents 1 2 3 4 4.1 5 6 6.1 6.2 7 7.1 7.2 7.2.1 7.2.2 7.2.3 7.2.4 7.2.5 7.2.5.1 7.2.6 7.2.7 7.2.8 7.2.9 7.2.10 8 9 9.1 9.2 9.3 9.4 10 10.1 10.2 10.3 10.4 10.5 10.6 10.7 11 11.1 11.2 11.3 11.4 11.5 11.6 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Ordering information . . . . . . .