Datasheet

LPC11CX2_CX4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3.1 — 15 May 2013 58 of 62
NXP Semiconductors
LPC11Cx2/Cx4
32-bit ARM Cortex-M0 microcontroller
15. Revision history
Table 22. Revision history
Document ID Release date Data sheet status Change notice Supersedes
LPC11CX2_CX4 v.3.1 20130515 Product data sheet - LPC11CX2_CX4 v.3
Modifications:
• Table 3 and Table 4: Added “5 V tolerant pad” to RESET/PIO0_0 table note.
• Table 5:
– Added Table note 2.
– Corrected V
DD
min and max.
• Table 8: Added Table note 1.
• Table 10: Removed BOD interrupt level 0.
LPC11CX2_CX4 v.3 20110627 Product data sheet - LPC11C12_C14 v.2
Modifications:
• I
2
C-bus pins configured as standard mode pins, parameter I
OL
changed to 3.5 mA
(minimum) for 2.0 V  V
DD
 3.6 V.
• Parameter V
x
added to Table 5 “Limiting values”.
• C_CAN power consumption data added to Table 11.
• ADC sampling frequency corrected in Table 7 (Table note 7).
• Reflow soldering footprint drawing added (Section 13).
• Pull-up level specified in Table 3 and Table 4.
• Parameter T
cy(clk)
corrected on Table 18.
• Condition for parameter T
stg
in Table 5 updated.
• Table note 5 of Table 5 updated.
• Table 18 T~cy(clk) condition changed from “when only receiving” to “full-duplex mode”
LPC11CX2_CX4 v.2 20101203 Product data sheet - LPC11C12_C14 v.1
Modifications:
• Parts LPC11C22 and LPC11C24 added.
• Pin description for parts LPC11C22 and LPC11C24 added (Table 4).
• Static characteristics for CAN transceiver added (Table 8).
• Description of high-speed, on-chip CAN transceiver added (LPC11C22/C24). See
Section 7.11.2.
• Application diagram for connecting the C_CAN to an external transceiver added
(Section 11.6).
• Application diagram for high-speed, on-chip CAN transceiver added (Section 11.7).
• Typical value for parameter N
endu
added in Table 12 “Flash characteristics”.
• Description of RESET and WAKEKUP pins updated in Table 3.
• PLL output frequency limited to < 100 MHz in Section 7.16.2 “System PLL”.
• Parameter V
hys
for I
2
C bus pins: typical value corrected V
hys
= 0.05V
DD
in Table 6.
LPC11C12_C14 v.1 20100921 Product data sheet - -