Datasheet
Table Of Contents
- 1. General description
- 2. Features and benefits
- 3. Applications
- 4. Ordering information
- 5. Block diagram
- 6. Pinning information
- 7. Functional description
- 7.1 ARM Cortex-M0 processor
- 7.2 On-chip flash program memory
- 7.3 On-chip SRAM
- 7.4 Memory map
- 7.5 Nested Vectored Interrupt Controller (NVIC)
- 7.6 IOCONFIG block
- 7.7 Fast general purpose parallel I/O
- 7.8 UART
- 7.9 SPI serial I/O controller
- 7.10 I2C-bus serial I/O controller
- 7.11 C_CAN controller
- 7.12 10-bit ADC
- 7.13 General purpose external event counter/timers
- 7.14 System tick timer
- 7.15 Watchdog timer
- 7.16 Clocking and power control
- 7.17 System control
- 7.18 Emulation and debugging
- 8. Limiting values
- 9. Static characteristics
- 10. Dynamic characteristics
- 11. Application information
- 12. Package outline
- 13. Soldering
- 14. Abbreviations
- 15. Revision history
- 16. Legal information
- 17. Contact information
- 18. Contents
LPC11CX2_CX4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3.1 — 15 May 2013 42 of 62
NXP Semiconductors
LPC11Cx2/Cx4
32-bit ARM Cortex-M0 microcontroller
Conditions: V
DD
= 3.3 V; standard port pins and PIO0_7.
Fig 14. Typical LOW-level output current I
OL
versus LOW-level output voltage V
OL
Conditions: V
DD
= 3.3 V; standard port pins.
Fig 15. Typical HIGH-level output voltage V
OH
versus HIGH-level output source current
I
OH
V
OL
(V)
0 0.60.40.2
002aae991
5
10
15
I
OL
(mA)
0
T = 85 °C
25 °C
−40 °C
I
OH
(mA)
0 24168
002aae992
2.8
2.4
3.2
3.6
V
OH
(V)
2
T = 85 °C
25 °C
−40 °C