Datasheet

LPC11CX2_CX4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3.1 — 15 May 2013 38 of 62
NXP Semiconductors
LPC11Cx2/Cx4
32-bit ARM Cortex-M0 microcontroller
Conditions: V
DD
= 3.3 V; sleep mode entered from flash; all peripherals disabled in the
SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral clocks disabled; internal
pull-up resistors disabled; BOD disabled; pin CAN_RXD pulled LOW externally.
(1) System oscillator and system PLL disabled; IRC enabled.
(2) System oscillator and system PLL enabled; IRC disabled.
Fig 9. Sleep mode: Typical supply current I
DD
versus temperature for different system
clock frequencies
Conditions: BOD disabled; all oscillators and analog blocks disabled in the PDSLEEPCFG register
(PDSLEEPCFG = 0x0000 18FF); pin CAN_RXD pulled LOW externally.
Fig 10. Deep-sleep mode: Typical supply current I
DD
versus temperature for different
supply voltages V
DD
002aaf392
temperature (°C)
−40 853510 60−15
2
6
4
8
I
DD
(mA)
0
12 MHz
(1)
36 MHz
(2)
48 MHz
(2)
24 MHz
(2)
002aaf394
temperature (°C)
−40 853510 60−15
10
30
20
40
I
DD
(μA)
0
3.6 V
3.3 V
2.0 V
1.8 V