Datasheet

LPC11CX2_CX4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3.1 — 15 May 2013 37 of 62
NXP Semiconductors
LPC11Cx2/Cx4
32-bit ARM Cortex-M0 microcontroller
Conditions: T
amb
= 25 C; active mode entered executing code while(1){} from flash; all
peripherals disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral
clocks disabled; internal pull-up resistors disabled; BOD disabled; pin CAN_RXD pulled LOW
externally.
(1) System oscillator and system PLL disabled; IRC enabled.
(2) System oscillator and system PLL enabled; IRC disabled.
Fig 7. Active mode: Typical supply current I
DD
versus supply voltage V
DD
for different
system clock frequencies
Conditions: V
DD
= 3.3 V; active mode entered executing code while(1){} from flash; all
peripherals disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral
clocks disabled; internal pull-up resistors disabled; BOD disabled; pin CAN_RXD pulled LOW
externally.
(1) System oscillator and system PLL disabled; IRC enabled.
(2) System oscillator and system PLL enabled; IRC disabled.
Fig 8. Active mode: Typical supply current I
DD
versus temperature for different system
clock frequencies
V
DD
(V)
1.8 3.63.02.4
002aaf390
4
8
12
I
DD
(mA)
0
12 MHz
(1)
24 MHz
(2)
36 MHz
(2)
48 MHz
(2)
temperature (°C)
−40 853510 60−15
002aaf391
4
8
12
I
DD
(mA)
0
12 MHz
(1)
24 MHz
(2)
36 MHz
(2)
48 MHz
(2)