Datasheet
Table Of Contents
- 1. General description
- 2. Features and benefits
- 3. Applications
- 4. Ordering information
- 5. Block diagram
- 6. Pinning information
- 7. Functional description
- 7.1 ARM Cortex-M0 processor
- 7.2 On-chip flash program memory
- 7.3 On-chip SRAM
- 7.4 Memory map
- 7.5 Nested Vectored Interrupt Controller (NVIC)
- 7.6 IOCONFIG block
- 7.7 Fast general purpose parallel I/O
- 7.8 UART
- 7.9 SPI serial I/O controller
- 7.10 I2C-bus serial I/O controller
- 7.11 C_CAN controller
- 7.12 10-bit ADC
- 7.13 General purpose external event counter/timers
- 7.14 System tick timer
- 7.15 Watchdog timer
- 7.16 Clocking and power control
- 7.17 System control
- 7.18 Emulation and debugging
- 8. Limiting values
- 9. Static characteristics
- 10. Dynamic characteristics
- 11. Application information
- 12. Package outline
- 13. Soldering
- 14. Abbreviations
- 15. Revision history
- 16. Legal information
- 17. Contact information
- 18. Contents
LPC11CX2_CX4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3.1 — 15 May 2013 31 of 62
NXP Semiconductors
LPC11Cx2/Cx4
32-bit ARM Cortex-M0 microcontroller
[1] Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply voltages.
[2] T
amb
=25C.
[3] I
DD
measurements were performed with all pins configured as GPIO outputs driven LOW and pull-up resistors disabled.
[4] IRC enabled; system oscillator disabled; system PLL disabled.
[5] Pin CAN_RXD pulled LOW externally.
[6] BOD disabled.
[7] All peripherals disabled in the SYSAHBCLKCTRL register. Peripheral clocks to UART and SPI0/1 disabled in system configuration
block.
[8] IRC disabled; system oscillator enabled; system PLL enabled.
[9] All oscillators and analog blocks turned off in the PDSLEEPCFG register; PDSLEEPCFG = 0x0000 18FF.
[10] WAKEUP pin pulled HIGH externally.
[11] Including voltage on outputs in 3-state mode.
[12] V
DD
supply voltage must be present.
I
OL
LOW-level output
current
V
OL
=0.4V
2.0 V V
DD
3.6 V
4--mA
1.8 V V
DD
< 2.0 V 3--mA
I
OLS
LOW-level short-circuit
output current
V
OL
=V
DD
[14]
--50mA
I
pd
pull-down current V
I
=5V 10 50 150 A
I
pu
pull-up current V
I
=0V
2.0 V V
DD
3.6 V
15 50 85 A
1.8 V V
DD
< 2.0 V 10 50 85 A
V
DD
<V
I
<5V 000A
I
2
C-bus pins (PIO0_4 and PIO0_5)
V
IH
HIGH-level input
voltage
0.7V
DD
--V
V
IL
LOW-level input voltage - - 0.3V
DD
V
V
hys
hysteresis voltage - 0.05V
DD
-V
I
OL
LOW-level output
current
V
OL
=0.4V; I
2
C-bus pins
configured as standard
mode pins
2.0 V V
DD
3.6 V
3.5--mA
1.8 V V
DD
< 2.0 V 3 - -
I
OL
LOW-level output
current
V
OL
=0.4V; I
2
C-bus pins
configured as Fast-mode
Plus pins
2.0 V V
DD
3.6 V
20--mA
1.8 V V
DD
< 2.0 V 16 - -
I
LI
input leakage current V
I
=V
DD
[15]
-24A
V
I
=5V - 10 22 A
Oscillator pins
V
i(xtal)
crystal input voltage 0.5 1.8 1.95 V
V
o(xtal)
crystal output voltage 0.5 1.8 1.95 V
Table 6. Static characteristics …continued
T
amb
=
40
C to +85
C, unless otherwise specified.
Symbol Parameter Conditions Min Typ
[1]
Max Unit