Datasheet
Table Of Contents
- 1. General description
- 2. Features and benefits
- 3. Applications
- 4. Ordering information
- 5. Block diagram
- 6. Pinning information
- 7. Functional description
- 7.1 ARM Cortex-M0 processor
- 7.2 On-chip flash program memory
- 7.3 On-chip SRAM
- 7.4 Memory map
- 7.5 Nested Vectored Interrupt Controller (NVIC)
- 7.6 IOCONFIG block
- 7.7 Fast general purpose parallel I/O
- 7.8 UART
- 7.9 SPI serial I/O controller
- 7.10 I2C-bus serial I/O controller
- 7.11 C_CAN controller
- 7.12 10-bit ADC
- 7.13 General purpose external event counter/timers
- 7.14 System tick timer
- 7.15 Watchdog timer
- 7.16 Clocking and power control
- 7.17 System control
- 7.18 Emulation and debugging
- 8. Limiting values
- 9. Static characteristics
- 10. Dynamic characteristics
- 11. Application information
- 12. Package outline
- 13. Soldering
- 14. Abbreviations
- 15. Revision history
- 16. Legal information
- 17. Contact information
- 18. Contents

LPC11CX2_CX4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3.1 — 15 May 2013 20 of 62
NXP Semiconductors
LPC11Cx2/Cx4
32-bit ARM Cortex-M0 microcontroller
• The C_CAN API includes the following functions:
– C_CAN set-up and initialization
– C_CAN send and receive messages
– C_CAN status
– CANopen object dictionary
– CANopen SDO expedited communication
– CANopen SDO segmented communication primitives
– CANopen SDO fall-back handler
• Flash ISP programming via C_CAN supported.
7.11.2 On-chip, high-speed CAN transceiver
Remark: The on-chip CAN transceiver is available on parts LPC11C22/C24 only.
Compared to the LPC11C12/C14, the LPC11C22/C24 supports fewer GPIO functions,
and in addition, one counter/timer match function is removed to allow interfacing the CAN
high-speed transceiver to the CAN bus. See Table 4
and Figure 1.
7.11.2.1 Features
• Data rates of up to 1 Mbit/s
• Fully ISO 11898-2 compliant
• Undervoltage detection and thermal protection
• Low ElectroMagnetic Emission (EME) and high ElectroMagnetic Immunity (EMI)
7.11.2.2 Normal mode
A LOW level on pin STB selects Normal mode. In this mode, the transceiver is able to
transmit and receive data via the bus lines CANH and CANL (see Figure 28
). The
differential receiver converts the analog data on the bus lines into digital data which are
received by the CAN_RXD input of the C_CAN controller.
7.11.2.3 Silent mode
A HIGH level on pin STB selects Silent mode. In Silent mode the transmitter is disabled,
releasing the bus pins to recessive state. All other functions, including the receiver,
continue to operate as in Normal mode. Silent mode can be used to prevent a faulty
C_CAN controller from disrupting all network communications.
7.11.2.4 Undervoltage protection
Should V
CC
or VDD_CAN drop below their respective undervoltage detection levels
(V
uvd(VCC)
and V
uvd (VDD_CAN)
; see Table 8), the transceiver will switch off and disengage
from the bus (zero load) until V
CC
and VDD_CAN have recovered.
7.11.2.5 Thermal protection
The output drivers are protected against overtemperature conditions. If the virtual junction
temperature exceeds the shutdown junction temperature, T
j(sd)
(see Table 8), the output
drivers will be disabled until the virtual junction temperature falls below T
j(sd)
.