Datasheet
Table Of Contents
- 1. General description
- 2. Features and benefits
- 3. Applications
- 4. Ordering information
- 5. Block diagram
- 6. Pinning information
- 7. Functional description
- 7.1 ARM Cortex-M0 processor
- 7.2 On-chip flash program memory
- 7.3 On-chip SRAM
- 7.4 Memory map
- 7.5 Nested Vectored Interrupt Controller (NVIC)
- 7.6 IOCONFIG block
- 7.7 Fast general purpose parallel I/O
- 7.8 UART
- 7.9 SPI serial I/O controller
- 7.10 I2C-bus serial I/O controller
- 7.11 C_CAN controller
- 7.12 10-bit ADC
- 7.13 General purpose external event counter/timers
- 7.14 System tick timer
- 7.15 Watchdog timer
- 7.16 Clocking and power control
- 7.17 System control
- 7.18 Emulation and debugging
- 8. Limiting values
- 9. Static characteristics
- 10. Dynamic characteristics
- 11. Application information
- 12. Package outline
- 13. Soldering
- 14. Abbreviations
- 15. Revision history
- 16. Legal information
- 17. Contact information
- 18. Contents
LPC11CX2_CX4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3.1 — 15 May 2013 13 of 62
NXP Semiconductors
LPC11Cx2/Cx4
32-bit ARM Cortex-M0 microcontroller
PIO1_11/AD7 42
[5]
no I/O I; PU PIO1_11 — General purpose digital input/output pin.
I- AD7 — A/D converter, input 7.
PIO2_0 to PIO2_11 Port 2 — Port 2 is a 12-bit I/O port with individual direction and
function controls for each bit. The operation of port 2 pins depends
on the function selected through the IOCONFIG register block.
PIO2_0/DTR
/
SSEL1
2
[3]
no I/O I; PU PIO2_0 — General purpose digital input/output pin.
I/O - DTR
— Data Terminal Ready output for UART.
I/O - SSEL1 — Slave Select for SPI1.
PIO2_1/DSR
/SCK1 13
[3]
no I/O I; PU PIO2_1 — General purpose digital input/output pin.
I- DSR
— Data Set Ready input for UART.
I/O - SCK1 — Serial clock for SPI1.
PIO2_2/DCD
/
MISO1
26
[3]
no I/O I; PU PIO2_2 — General purpose digital input/output pin.
I- DCD
— Data Carrier Detect input for UART.
I/O - MISO1 — Master In Slave Out for SPI1.
PIO2_3/RI
/MOSI1 38
[3]
no I/O I; PU PIO2_3 — General purpose digital input/output pin.
I- RI
— Ring Indicator input for UART.
I/O - MOSI1 — Master Out Slave In for SPI1.
PIO2_6 1
[3]
no I/O I; PU PIO2_6 — General purpose digital input/output pin.
PIO2_7 11
[3]
no I/O I; PU PIO2_7 — General purpose digital input/output pin.
PIO2_8 12
[3]
no I/O I; PU PIO2_8 — General purpose digital input/output pin.
PIO2_10 25
[3]
no I/O I; PU PIO2_10 — General purpose digital input/output pin.
PIO2_11/SCK0 31
[3]
no I/O I; PU PIO2_11 — General purpose digital input/output pin.
I/O - SCK0 — Serial clock for SPI0.
PIO3_0 to PIO3_3 Port 3 — Port 3 is a 12-bit I/O port with individual direction and
function controls for each bit. The operation of port 3 pins depends
on the function selected through the IOCONFIG register block. Pins
PIO3_4 to PIO3_11 are not available.
PIO3_0/DTR
36
[3]
no I/O I; PU PIO3_0 — General purpose digital input/output pin.
O- DTR
— Data Terminal Ready output for UART.
PIO3_1/DSR
37
[3]
no I/O I; PU PIO3_1 — General purpose digital input/output pin.
I- DSR
— Data Set Ready input for UART.
PIO3_2/DCD
43
[3]
no I/O I; PU PIO3_2 — General purpose digital input/output pin.
I DCD
— Data Carrier Detect input for UART.
PIO3_3/RI
48
[3]
no I/O I; PU PIO3_3 — General purpose digital input/output pin.
I- RI
— Ring Indicator input for UART.
CANL 18 no I/O - LOW-level CAN bus line.
CANH 19 no I/O - HIGH-level CAN bus line.
STB 22 no I - Silent mode control input for CAN transceiver (LOW = Normal mode,
HIGH = silent mode).
VDD_CAN 17 - - - Supply voltage for I/O level of CAN transceiver.
V
CC
20 - - - Supply voltage for CAN transceiver.
Table 4. LPC11C22/C24 pin description table
Symbol Pin Start
logic
inputs
Type Reset
state
[1]
Description