Datasheet

LPC11CX2_CX4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3.1 — 15 May 2013 10 of 62
NXP Semiconductors
LPC11Cx2/Cx4
32-bit ARM Cortex-M0 microcontroller
[1] Pin state at reset for default function: I = Input; O = Output; PU = internal pull-up enabled (pins pulled up to full V
DD
level); IA = inactive,
no pull-up/down enabled.
[2] 5 V tolerant pad. RESET
functionality is not available in Deep power-down mode. Use the WAKEUP pin to reset the chip and wake up
from Deep power-down mode. An external pull-up resistor is required on this pin for the Deep power-down mode. See Figure 26
for the
reset pad configuration.
[3] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see Figure 25
).
[4] I
2
C-bus pads compliant with the I
2
C-bus specification for I
2
C standard mode and I
2
C Fast-mode Plus.
[5] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.
When configured as a ADC input, digital section of the pad is disabled and the pin is not 5 V tolerant (see Figure 25
).
[6] 5 V tolerant digital I/O pad without pull-up/pull-down resistors.
[7] When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded
(grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating.
PIO3_0/DTR 36
[3]
no I/O I; PU PIO3_0 — General purpose digital input/output pin.
O- DTR
— Data Terminal Ready output for UART.
PIO3_1/DSR
37
[3]
no I/O I; PU PIO3_1 — General purpose digital input/output pin.
I- DSR
— Data Set Ready input for UART.
PIO3_2/DCD
43
[3]
no I/O I; PU PIO3_2 — General purpose digital input/output pin.
I DCD
— Data Carrier Detect input for UART.
PIO3_3/RI
48
[3]
no I/O I; PU PIO3_3 — General purpose digital input/output pin.
I- RI
— Ring Indicator input for UART.
CAN_RXD 19
[6]
no I I; IA CAN_RXD — C_CAN receive data input.
CAN_TXD 20
[6]
no O I; IA CAN_TXD — C_CAN transmit data output.
V
DD
8; 44 - I - Supply voltage to the internal regulator, the external rail, and the
ADC. Also used as the ADC reference voltage.
XTALIN 6
[7]
- I - Input to the oscillator circuit and internal clock generator circuits.
Input voltage must not exceed 1.8 V.
XTALOUT 7
[7]
- O - Output from the oscillator amplifier.
V
SS
5; 41 - I - Ground.
Table 3. LPC11C12/C14 pin description table
Symbol Pin Start
logic
inputs
Type Reset
state
[1]
Description
Table 4. LPC11C22/C24 pin description table
Symbol Pin Start
logic
inputs
Type Reset
state
[1]
Description
PIO0_0 to PIO0_11 Port 0 — Port 0 is a 12-bit I/O port with individual direction and
function controls for each bit. The operation of port 0 pins depends
on the function selected through the IOCONFIG register block.
RESET
/PIO0_0 3
[2]
yes I I; PU RESET — External reset input with 20 ns glitch filter. A LOW-going
pulse as short as 50 ns on this pin resets the device, causing I/O
ports and peripherals to take on their default states, and processor
execution to begin at address 0.
I/O - PIO0_0 — General purpose digital input/output pin with 10 ns glitch
filter.