Datasheet

LPC111X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 9.2 — 26 March 2014 79 of 127
NXP Semiconductors
LPC1110/11/12/13/14/15
32-bit ARM Cortex-M0 microcontroller
Power measurements in Active, Sleep, and Deep-sleep modes were performed under the
following conditions (see LPC111x user manual):
• Configure all pins as GPIO with pull-up resistor disabled in the IOCONFIG block.
• Configure GPIO pins as outputs using the GPIOnDIR registers.
• Write 0 to all GPIOnDATA registers to drive the outputs LOW.
Conditions: T
amb
= 25 C; active mode entered executing code while(1){} from flash; all
peripherals disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral
clocks disabled; internal pull-up resistors disabled; BOD disabled; low-current mode.
1 MHz to 6 MHz: system oscillator enabled; PLL, IRC disabled.
12 MHz: IRC enabled; system oscillator, PLL disabled.
24 MHz to 48 MHz: IRC disabled; system oscillator, PLL enabled.
Fig 28. Active mode: Typical supply current I
DD
versus supply voltage V
DD
for different
system clock frequencies (for LPC111xXL)
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