Datasheet

HEF4094B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 11 — 29 August 2013 3 of 20
NXP Semiconductors
HEF4094B
8-stage shift-and-store register
5. Pinning information
5.1 Pinning
5.2 Pin description
Fig 4. Pin configuration SOT38-4 and SOT109-1 Fig 5. Pin configuration SOT338-1 and SOT403-1
HEF4094B
STR V
DD
DOE
CP QP4
QP0 QP5
QP1 QP6
QP2 QP7
QP3 QS2
V
SS
QS1
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1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
+()%
675 9
''
' 2(
&
3 43
43 43
43 43
43 43
43 46
9
66
46
DDD
















Table 2. Pin description
Symbol Pin Description
STR 1 strobe input
D 2 data input
CP 3 clock input
QP0 to QP7 4, 5, 6, 7, 14, 13, 12, 11 parallel output
V
SS
8 ground supply voltage
QS1 9 serial output
QS2 10 serial output
OE 15 output enable input
V
DD
16 supply voltage