Datasheet

HEF4094B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 11 — 29 August 2013 10 of 20
NXP Semiconductors
HEF4094B
8-stage shift-and-store register
Measurement points are given in Table 9.
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 9. 3-state output enable and disable times for OE input
001aai545
t
PLZ
t
PHZ
outputs
disabled
outputs
enabled
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
OE input
V
M
V
I
V
OL
V
OH
GND
V
Y
V
X
t
PZL
t
PZH
V
M
V
M
V
DD
GND
Measurement points are given in Table 9.
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 10. Data input data set up and hold times
001aaf115
GND
GND
t
h
t
su
t
h
t
su
V
M
V
M
V
M
V
I
V
OH
V
OL
V
I
QPn, QS1, QS2 output
CP input
D input