Datasheet

HEF4066B_6 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 06 — 25 March 2010 6 of 16
NXP Semiconductors
HEF4066B
Quad single-pole single-throw analog switch
11. Dynamic characteristics
Table 8. Dynamic characteristics
T
amb
= 25 ° C; V
SS
= 0 V; for test circuit see Figure 9.
Symbol Parameter Conditions V
DD
Typ Max Unit
t
PHL
HIGH to LOW propagation delay nY, nZ to nZ, nY; see Figure 7 5 V 10 20 ns
10 V 5 10 ns
15 V 5 10 ns
nY, nZ to nZ, nY; see Figure 7
5 V 10 20 ns
10 V 5 10 ns
15 V 5 10 ns
t
PHZ
HIGH to OFF-state
propagation delay
nE to nY, nZ; see Figure 8 5 V 80 160 ns
10 V 65 130 ns
15 V 60 120 ns
t
PZH
OFF-state to HIGH
propagation delay
nE to nY, nZ; see Figure 8 5 V 40 80 ns
10V 2040ns
15V 1530ns
t
PLZ
LOW to OFF-state
propagation delay
nE to nY, nZ; see Figure 8 5 V 80 160 ns
10 V 70 140 ns
15 V 70 140 ns
t
PZL
OFF-state to LOW
propagation delay
nE to nY, nZ; see Figure 8 5 V 45 90 ns
10V 2040ns
15V 1530ns
Table 9. Dynamic power dissipation P
D
P
D
can be calculated from the formulas shown; V
SS
= 0 V; t
r
= t
f
≤ 20 ns; T
amb
= 25 ° C.
Symbol Parameter V
DD
Typical formula for P
D
(μW) where:
P
D
dynamic power
dissipation
5V P
D
= 2500 × f
i
+ Σ(f
o
× C
L
) × V
DD
2
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
DD
= supply voltage in V;
Σ(C
L
× f
o
) = sum of the outputs.
10 V P
D
= 11500 × f
i
+ Σ(f
o
× C
L
) × V
DD
2
15 V P
D
= 29000 × f
i
+ Σ(f
o
× C
L
) × V
DD
2