Datasheet

HEF4053B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 11 — 11 September 2014 2 of 20
NXP Semiconductors
HEF4053B
Triple single-pole double-throw analog switch
5. Functional diagram
Fig 1. Logic symbol Fig 2. Functional diagram
DDH
< 
<
6


6
6

(
< 
< 
< 
< 
= 
= 
= 
001aae124
LOGIC
LEVEL
CONVERSION
11
16
V
DD
13 1Y1
S1
LOGIC
LEVEL
CONVERSION
DECODER
LOGIC
LEVEL
CONVERSION
12 1Y0
14 1Z
1 2Y1
2 2Y0
15 2Z
3 3Y1
5 3Y0
43Z
10
S2
9
87
V
EE
V
SS
S3
6
E
Fig 3. Logic diagram (one multiplexer/demultiplexer)
001aae645
nY1
nZ
nY0
LEVEL
CONVERTER
LEVEL
CONVERTER
to other multiplexers/demultiplexers
Sn
E