Datasheet

HEF4052B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 9 — 11 September 2014 5 of 22
NXP Semiconductors
HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
6. Pinning information
6.1 Pinning
6.2 Pin description
Fig 6. Pin configuration SOT38-4 and SOT109-1 Fig 7. Pin configuration SOT338-1 and SOT403-1
001aag215
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
HEF4052B
2Y0
V
DD
2Y2 1Y2
2Z 1Y1
2Y3 1Z
2Y1 1Y0
E 1Y3
V
EE
S1
V
SS
S2
HEF4052B
2Y0 V
DD
2Y2 1Y2
2Z 1Y1
2Y3 1Z
2Y1 1Y0
E 1Y3
V
EE
S1
V
SS
S2
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1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
Table 2. Pin description
Symbol Pin Description
E
6 enable input (active LOW)
V
EE
7 supply voltage
V
SS
8 ground supply voltage
S1, S2 10, 9 select input
1Y0, 1Y1, 1Y2, 1Y3, 2Y0, 2Y1, 2Y2, 2Y3 12, 14, 15, 11, 1, 5, 2, 4 independent input or output
1Z, 2Z 13, 3 common output or input
V
DD
16 supply voltage