Datasheet

HEF4051B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 11 — 11 September 2014 12 of 23
NXP Semiconductors
HEF4051B
8-channel analog multiplexer/demultiplexer
[1] For Yn to Z or Z to Yn propagation delays use V
EE
. For Sn to Yn or Z propagation delays use V
DD
.
Test data is given in Table 10
.
Definitions:
DUT = Device Under Test.
R
T
= Termination resistance should be equal to output impedance Z
o
of the pulse generator.
C
L
= Load capacitance including test jig and probe.
R
L
= Load resistance.
Fig 16. Test circuit for measuring switching times
001aaj903
V
I
V
O
R
T
C
L
R
L
S1
DUT
PULSE
GENERATOR
t
W
V
M
V
I
V
I
V
DD
V
DD
V
SS
V
EE
open
0 V
negative
pulse
V
I
0 V
positive
pulse
10 %
90 %
90 %
10 %
V
M
V
M
V
M
t
W
t
f
t
f
t
r
t
r
Table 10. Test data
Input Load S1 position
Yn, Z Sn and E t
r
, t
f
V
M
C
L
R
L
t
PHL
[1]
t
PLH
t
PZH
, t
PHZ
t
PZL
, t
PLZ
other
V
DD
or V
EE
V
DD
or V
SS
 20 ns 0.5V
DD
50 pF 10 k V
DD
or V
EE
V
EE
V
EE
V
DD
V
EE