Datasheet

Introduction
56F826 Technical Data, Rev. 14
Freescale Semiconductor 9
Figure 2-1 56F826 Signals Identified by Functional Group
1
1. Alternate pin functionality is shown in parentheses.
56F826
2.5V Power
3.3V Analog Power
3.3V Power
Ground
Analog Ground
Ground
PLL
and
Clock
External
Address Bus or
GPIO
External Data
Bus
External
Bus Control
Dedicated
GPIO
SPI1 Port
or GPIO
SCI0, SCI1
Port or
SPI0 Port
V
DD
V
DDA
V
DDIO
V
SS
V
SSA
V
SSIO
EXTAL
XTAL (CLOCKIN)
CLKO
A0-A7 (GPIOE)
A8-A15 (GPIOA)
D0–D15
PS
DS
RD
WR
TA0 (GPIOF0)
TA1 (GPIOF1)
TA2 (GPIOF2)
TA3 (GPIOF3)
TCK
TMS
TDI
TDO
TRST
DE
Quad Timer A
or GPIO
JTAG/OnCE™
Port
GPIOB0–7
GPIOD0–7
SRD (GPIOC0)
SRFS (GPIOC1)
SRCK (GPIOC2)
STD (GPIOC3)
STFS (GPIOC4)
STCK (GPIOC5)
SCLK (GPIOF4)
MOSI (GPIOF5)
MISO (GPIOF6)
SS
(GPIOF7)
TXD0 (SCLK0)
RXD0 (MOSI0)
TXD1 (MISO0)
RXD1 (SS0
)
IRQA
IRQB
RESET
EXTBOOT
SSI Port
or GPIO
3
1
4
4*
1
4
1
1
1
8
8
16
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Interrupt/
Program
Control
8
8
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
*Includes TCS pin, which is reserved for factory use and is tied to VSS