Datasheet

56F826 Technical Data, Rev. 14
42 Freescale Semiconductor
Table 3-14 SSI Slave Mode
1
Switching Characteristics
Operating Conditions: V
SSIO
= V
SS
= V
SSA
= 0V, V
DDA
= V
DDIO
= 3.0–3.6V, V
DD
= 2.25–2.75V, T
A
= –40 ° to +85 ° C, C
L
≤ 50pF, f
op
= 80MHz
Parameter Symbol Min Typ Max Units
STCK frequency fs —
10
2
MHz
STCK period
3
t
SCKW
100 — — ns
STCK high time t
SCKH
50
4
—— ns
STCK low time t
SCKL
50
4
—— ns
Output clock rise/fall time — TBD —ns
Delay from STCK high to STFS (bl) high - Slave
5
t
TFSBHS
0.1 — 46 ns
Delay from STCK high to STFS (wl) high - Slave
5
t
TFSWHS
0.1 — 46 ns
Delay from SRCK high to SRFS (bl) high - Slave
5
t
RFSBHS
0.1 — 46 ns
Delay from SRCK high to SRFS (wl) high - Slave
5
t
RFSWHS
0.1 — 46 ns
Delay from STCK high to STFS (bl) low - Slave
5
t
TFSBLS
-1 — — ns
Delay from STCK high to STFS (wl) low - Slave
5
t
TFSWLS
-1 — — ns
Delay from SRCK high to SRFS (bl) low - Slave
5
t
RFSBLS
-46 — — ns
Delay from SRCK high to SRFS (wl) low - Slave
5
t
RFSWLS
-46 — — ns
STCK high to STXD enable from high impedance - Slave t
TXES
—— ns
STCK high to STXD valid - Slave t
TXVS
1—25 ns
STFS high to STXD enable from high impedance (first bit) -
Slave
t
FTXES
5.5 — 25 ns
STFS high to STXD valid (first bit) - Slave t
FTXVS
6—27 ns
STCK high to STXD not valid - Slave t
TXNVS
11 — 13 ns
STCK high to STXD high impedance - Slave t
TXHIS
11 — 28.5 ns
SRXD Setup time before SRCK low - Slave t
SS
4—— ns
SRXD Hold time after SRCK low - Slave t
HS
4—— ns