Datasheet

56F826 Technical Data, Rev. 14
14 Freescale Semiconductor
GPIOB0 66 Input or
Output
Port B GPIO—These eight dedicated General Purpose I/O (GPIO) pins can be
individually programmed as input or output pins.
After reset, the default state is GPIO input.
GPIOB1 67
GPIOB2 68
GPIOB3 69
GPIOB4 70
GPIOB5 71
GPIOB6 72
GPIOB7 73
GPIOD0 74 Input or
Output
Port D GPIO—These eight dedicated GPIO pins can be individually
programmed as an input or output pins.
After reset, the default state is GPIO input.
GPIOD1 75
GPIOD2 76
GPIOD3 77
GPIOD4 78
GPIOD5 79
GPIOD6 82
GPIOD7 83
SRD
(GPIOC0)
51 Input/Output
Input/Output
SSI Receive Data (SRD)—This input pin receives serial data and transfers the
data to the SSI Receive Shift Receiver.
Port C GPIO—This is a General Purpose I/O (GPIO) pin with the capability of
being individually programmed as input or output.
After reset, the default state is GPIO input.
SRFS
(GPIOC1)
52 Input/ Output
Input/Output
SSI Serial Receive Frame Sync (SRFS)—This bidirectional pin is used by the
receive section of the SSI as frame sync I/O or flag I/O. The STFS can be used
only by the receiver. It is used to synchronize data transfer and can be an input
or an output.
Port C GPIO—This is a General Purpose I/O (GPIO) pin with the capability of
being individually programmed as input or output.
After reset, the default state is GPIO input.
Table 2-1 56F826 Signal and Package Information for the 100 Pin LQFP (Continued)
Signal
Name
Pin No. Type Description