Datasheet

Introduction
56F807 Technical Data Technical Data, Rev. 16
Freescale Semiconductor 9
Figure 2-1 56F807 Signals Identified by Functional Group
1
1. Alternate pin functionality is shown in parenthesis.
56F807
Power Port
Ground Port
Power Port
Ground Port
PLL
and
Clock
External
Address Bus or
GPIO
External
Data Bus
External
Bus Control
Dedicated
GPIO
SCI0 Port
or GPIO
SCI1 Port
or GPI0
V
DD
V
SS
V
DDA
V
SSA
VCAPC
V
PP
EXTAL
XTAL
CLKO
A0-A5
A6-7 (GPIOE2-E3)
A8-15 (GPIOA0-A7)
D0–D15
PS
DS
RD
WR
PHASEA0 (TA0)
PHASEB0 (TA1)
INDEX0 (TA2)
HOME0 (TA3)
PHASEA1 (TB0)
PHASEB1 (TB1)
INDEX1 (TB2)
HOME1 (TB3)
TCK
TMS
TDI
TDO
TRST
DE
Quadrature
Decoder or
Quad Timer A
JTAG/OnCE™
Port
GPIOB0–7
GPIOD0–5
PWMA0-5
ISA0-2
FAULTA0-3
PWMB0-5
ISB0-2
FAULTB0-3
SCLK (GPIOE4)
MOSI (GPIOE5)
MISO (GPIOE6)
SS
(GPIOE7)
TXD0 (GPIOE0)
RXD0 (GPIOE1)
TXD1 (GPIOD6)
RXD1 (GPIOD7)
ANA0-7
VREF
ANB0-7
MSCAN_RX
MSCAN_TX
TC0-1
TD0-3
IRQA
IRQB
RESET
RSTO
EXTBOOT
PWMB
Port
Quad
Timers
C & D
ADCA
Port
ADCB
Port
Other
Supply
Ports
8
10*
3
3
2
2
1
1
1
6
2
8
16
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Interrupt/
Program
Control
8
6
6
3
4
6
3
4
1
1
1
1
1
1
1
1
8
2
8
1
1
2
4
1
1
1
1
1
Quadrature
Decoder1 or
Quad Timer B
PWMA
Port
SPI Port
or GPIO
CAN
*includes TCS pin which is reserved for factory use and is tied to VSS