Datasheet

56F805 Technical Data, Rev. 16
14 Freescale Semiconductor
2.6 GPIO Signals
2.7 Pulse Width Modulator (PWM) Signals
Table 2-10 Dedicated General Purpose Input/Output (GPIO) Signals
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
8 GPIOB0
–
GPIOB7
Input or
Output
Input Port B GPIO—These eight dedicated General Purpose I/O
(GPIO) pins can be individually programmed as input or output
pins.
After reset, the default state is GPIO input.
6 GPIOD0–
GPIOD5
Input or
Output
Input Port D GPIO—These six dedicated General Purpose I/O (GPIO)
pins can be individually programmed as input or output pins.
After reset, the default state is GPIO input.
Table 2-11 Pulse Width Modulator (PWMA and PWMB) Signals
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
6 PWMA0
–5 Output Tri- stated PWMA0–5—These are six PWMA output pins.
3 ISA0–2 Input
(Schmitt)
Input ISA0–2—These three input current status pins are used for
top/bottom pulse width correction in complementary
channel operation for PWMA.
4 FAULTA0–3 Input
(Schmitt)
Input FAULTA0–3—These four Fault input pins are used for
disabling selected PWMA outputs in cases where fault
conditions originate off-chip.
6 PWMB0–5 Output Output PWMB0–5—These are six PWMB output pins.
3 ISB0
–2 Input
(Schmitt)
Input ISB0–2— These three input current status pins are used
for top/bottom pulse width correction in complementary
channel operation for PWMB.
4 FAULTB0–3 Input
(Schmitt)
Input FAULTB0–3—These four Fault input pins are used for
disabling selected PWMB outputs in cases where fault
conditions originate off-chip.