Datasheet
Table Of Contents
- Part 1 Overview
- Part 2 Signal/Connection Descriptions
- 2.1 Introduction
- 2.2 Power and Ground Signals
- 2.3 Clock and Phase Locked Loop Signals
- 2.4 Address, Data, and Bus Control Signals
- 2.5 Interrupt and Program Control Signals
- 2.6 GPIO Signals
- 2.7 Pulse Width Modulator (PWM) Signals
- 2.8 Serial Peripheral Interface (SPI) Signals
- 2.9 Quadrature Decoder Signals
- 2.10 Serial Communications Interface (SCI) Signals
- 2.11 CAN Signals
- 2.12 Analog-to-Digital Converter (ADC) Signals
- 2.13 Quad Timer Module Signals
- 2.14 JTAG/OnCE
- Part 3 Specifications
- 3.1 General Characteristics
- 3.2 DC Electrical Characteristics
- 3.3 AC Electrical Characteristics
- 3.4 Flash Memory Characteristics
- 3.5 External Clock Operation
- 3.6 External Bus Asynchronous Timing
- 3.7 Reset, Stop, Wait, Mode Select, and Interrupt Timing
- 3.8 Serial Peripheral Interface (SPI) Timing
- 3.9 Quad Timer Timing
- 3.10 Quadrature Decoder Timing
- 3.11 Serial Communication Interface (SCI) Timing
- 3.12 Analog-to-Digital Converter (ADC) Characteristics
- 3.13 Controller Area Network (CAN) Timing
- 3.14 JTAG Timing
- Part 4 Packaging
- Part 5 Design Considerations
- Part 6 Ordering Information

56F805 Technical Data, Rev. 16
10 Freescale Semiconductor
2.2 Power and Ground Signals
Table 2-2 Power Inputs
No. of Pins Signal Name Signal Description
8 V
DD
Power—These pins provide power to the internal structures of the chip, and
should all be attached to V
DD.
1 V
DDA
Analog Power—This pin is a dedicated power pin for the analog portion of the
chip and should be connected to a low noise 3.3V supply.
Table 2-3 Grounds
No. of Pins Signal Name Signal Description
7 V
SS
GND—These pins provide grounding for the internal structures of the chip, and
should all be attached to V
SS.
1 V
SSA
Analog Ground—This pin supplies an analog ground.
1 TCS TCS—This Schmitt pin is reserved for factory use and must be tied to V
SS
for
normal use. In block diagrams, this pin is considered an additional V
SS.
Table 2-4 Supply Capacitors and VPP
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
2 VCAPC Supply Supply VCAPC—Connect each pin to a 2.2μF or greater bypass
capacitor in order to bypass the core logic voltage regulator,
required for proper chip operation. For more information,
please refer to Section 5.2.
1 VPP Input Input VPP—This pin should be left unconnected as an open circuit
for normal functionality.