Datasheet

Introduction
56F803 Technical Data, Rev. 16
Freescale Semiconductor 9
Figure 2-1 56F803 Signals Identified by Functional Group
1
1. Alternate pin functionality is shown in parenthesis.
56F803
Power Port
Ground Port
Power Port
Ground Port
PLL
and
Clock
External
Address Bus or
GPIO
External
Data Bus
External
Bus Control
SCI0 Port
or GPIO
V
DD
V
SS
V
DDA
V
SSA
VCAPC
EXTAL
XTAL
CLKO
A0-A5
A6-7 (GPIOE2-E3)
A8-15 (GPIOA0-A7)
D0–D15
PS
DS
RD
WR
PHASEA0 (TA0)
PHASEB0 (TA1)
INDEX0 (TA2)
HOME0 (TA3)
TCK
TMS
TDI
TDO
TRST
DE
Quadrature
Decoder or
Quad Timer A
JTAG/OnCE™
Port
PWMA0-5
ISA0-2
FAULTA0-2
SCLK (GPIOE4)
MOSI (GPIOE5)
MISO (GPIOE6)
SS
(GPIOE7)
TXD0 (GPIOE0)
RXD0 (GPIOE1)
ANA0-7
VREF
MSCAN_RX
MSCAN_TX
TD1-2
IRQA
IRQB
RESET
EXTBOOT
Quad
Timer D
ADCA
Port
Other
Supply
Ports
6
6*
1
1
2
1
1
1
6
2
8
16
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Interrupt/
Program
Control
6
3
3
1
1
1
1
1
1
8
1
1
1
2
1
1
1
1
PWMA
Port
SPI Port
or GPIO
CAN
*includes TCS pin which is reserved for factory use and is tied to VSS