Datasheet

External Clock Operation
56F803 Technical Data, Rev. 16
Freescale Semiconductor 29
Figure 3-10 External Clock Timing
Table 3-8 External Clock Operation Timing Requirements
3
Operating Conditions: V
SS
= V
SSA
= 0 V, V
DD
= V
DDA
= 3.0–3.6 V, T
A
= –40° to +85°C
Characteristic Symbol Min Typ Max Unit
Frequency of operation (external clock driver)
1
1. See Figure 3-9 for details on using the recommended connection of an external clock driver.
f
osc
0—80MHz
Clock Pulse Width
2
,
3
2. The high or low pulse width must be no smaller than 6.25ns or the chip will not function. However, the high pulse width
does not have to be any particular percent of the low pulse width.
3. Parameters listed are guaranteed by design.
t
PW
6.25 — — ns
External
Clock
V
IH
V
IL
Note: The midpoint is V
IL
+ (V
IH
– V
IL
)/2.
90%
50%
10%
90%
50%
10%
t
PW
t
PW