Datasheet

Analog-to-Digital Converter (ADC) Characteristics
56F801 Technical Data, Rev. 17
Freescale Semiconductor 37
1. Parasitic capacitance due to package, pin to pin, and pin to package base coupling. (1.8pf)
2. Parasitic capacitance due to the chip bond pad, ESD protection devices and signal routing. (2.04pf)
3. Equivalent resistance for the ESD isolation resistor and the channel select mux. (500 ohms)
4. Sampling capacitor at the sample and hold circuit. Capacitor 4 is normally disconnected from the input and is only connected to it at
sampling time. (1pf)
Figure 3-26 Equivalent Analog Input Circuit
Total Harmonic Distortion
5
THD 55 60 dB
Signal-to-Noise plus Distortion
5
SINAD 54 56 dB
Effective Number of Bits
5
ENOB 8.5 9.5 bit
Spurious Free Dynamic Range
5
SFDR 60 65 dB
Bandwidth BW 100 KHz
ADC Quiescent Current (both ADCs) I
ADC
—50 mA
V
REF
Quiescent Current (both ADCs) I
VREF
—12 16.5 mA
1. For optimum ADC performance, keep the minimum V
ADCIN
value > 250mV. Inputs less than 250mV volts may convert to
a digital output code of 0 or cause erroneous conversions.
2. V
REF
must be equal to or less than V
DDA
- 0.3V and must be greater than 2.7V.
3. Measured in 10-90% range.
4. LSB = Least Significant Bit.
5. Guaranteed by characterization.
6. t
AIC
= 1/
f
ADIC
Table 3-15 ADC Characteristics (Continued)
Characteristic Symbol Min Typ Max Unit
1
2
3
4
ADC analog input