Datasheet
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DAC1405D750 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 5 — 31 January 2012 3 of 43
NXP Semiconductors
DAC1405D750
Dual 14-bit DAC, up to 750 Msps; 4 and 8 interpolating
5. Block diagram
Fig 1. Block diagram
001aal377
DAC1405D750
FIR1
2 ×
2 ×
FIR1
FIR2
2 ×
2 ×
FIR2
FIR3
2 ×
2 ×
FIR3
NCO
cos sin
62
66
63 65 64
CLOCK GENERATOR/PLL
COMPLEX MODULATOR
LATCH
Q
LATCH
I
CLKP
RESET_N
12
SYNCP
DAC A
AUXILIARY
DAC
AUXILIARY
DAC
DAC B
REFERENCE
BANDGAP
OFFSET
CONTROL
10-BIT
GAIN
CONTROL
10-BIT
OFFSET
CONTROL
10-BIT
GAIN
CONTROL
10-BIT
OFFSET
CONTROL
13
SYNCN
SCLK
SCS_N
SDIO
SDO
CLKN
Q0 to Q13
dual port/
interleaved
data modes
I0 to I13
8
9
41, 42,
45 to 48,
51 to 58
18 to 25,
28 to 31, 34, 35
SPI
AUXAN
GAPOUT
AUXAP
IOUTAN
VIRES
IOUTAP
IOUTBN
IOUTBP
AUXBN
AUXBP
3
69
2
91
68
90
85
86
73
74
mixer
+
++
+
A
B
+
−
mixer
mixer
mixer
x
sin x
x
sin x
14
14