Datasheet

DAC1405D750 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 5 — 31 January 2012 29 of 43
NXP Semiconductors
DAC1405D750
Dual 14-bit DAC, up to 750 Msps; 4 and 8 interpolating
This configuration is optimum for temperature drift compensation because the bandgap
reference voltage can be matched to the voltage across the feedback resistor.
The DAC current can also be set by applying an external reference voltage to the
non-inverting input pin GAPOUT and disabling the internal bandgap reference voltage
with GAP_PD (register 00h[0]; see Table 10 “
COMMon register (address 00h) bit
description”).
10.10.2 Full-scale current adjustment
The default full-scale current (I
O(fs)
) is 20 mA but further adjustments can be made by the
user to both DACs independently via the serial interface from 1.6 mA to 22 mA, 10 %.
The settings applied to DAC_A_GAIN_COARSE[3:0] (see Table 20 “
DAC_A_Cfg_2
register (address 0Ah) bit description” and Table 21 “DAC_A_Cfg_3 register (address
0Bh) bit description”) and to DAC_B_GAIN COARSE[3:0] (see Table 23 “DAC_B_Cfg_2
register (address 0Dh) bit description” and Table 24 “DAC_B_Cfg_3 register (address
0Eh) bit description”) define the coarse variation of the full-scale current (see Table 39).
Fig 11. Internal reference configuration
aaa-002266
REF.
BANDGAP
GAPOUT
V
DDA(1V8)
VIRES
DAC
CURRENT
SOURCES
ARRAY
AGND
AGND
100 nF
953 Ω
(1 %)
100
kΩ
Table 39. I
O(fs)
coarse adjustment
Default settings are shown highlighted.
DAC_GAIN_COARSE[3:0] I
O(fs)
(mA)
Decimal Binary
0 0000 1.6
1 0001 3.0
2 0010 4.4
3 0011 5.8
4 0100 7.2
5 0101 8.6
6011010.0
7011111.4
8 1000 12.8
9 1001 14.2
10 1010 15.6
11 1011 17.0