Datasheet
DAC1405D750 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 5 — 31 January 2012 27 of 43
NXP Semiconductors
DAC1405D750
Dual 14-bit DAC, up to 750 Msps; 4 and 8 interpolating
10.7.1 NCO in 32-bit
When using the NCO, the frequency can be set by the four registers FREQNCO_LSB,
FREQNCO_LISB, FREQNCO_UISB and FREQNCO_MSB over 32 bits.
The frequency for the NCO in 32-bit is calculated as follows:
(1)
where M is the decimal representation of FREQ_NCO[31:0].
The phase of the NCO can be set from 0 to 360 by both registers PHINCO_LSB and
PHINCO_MSB over 16 bits.
10.7.2 Low-power NCO
When using the low-power NCO, the frequency can be set by the 5 MSB of register
FREQNCO_MSB.
The frequency for the low-power NCO is calculated as follows:
(2)
where M is the decimal representation of FREQ_NCO[31:27].
The phase of the low-power NCO can be set by the 5 MSB of the register PHINCO_MSB.
10.7.3 Minus_3dB function
During normal use, a full-scale pattern will also be full scale at the output of the DAC.
Nevertheless, when the I and Q data are simultaneously close to full scale, some clipping
can occur and the Minus_3dB function can be used to reduce the gain by 3 dB in the
modulator. This is to keep a full-scale range at the output of the DAC without added
interferers.
10.8 x / (sin x)
Due to the roll-off effect of the DAC, a selectable FIR filter is inserted to compensate for
the x / (sin x) effect. This filter introduces a DC loss of 3.4 dB. The coefficients are
represented in Table 37
.
f
NCO
Mf
s
2
32
--------------
=
f
NCO
Mf
s
2
5
--------------
=
Table 37. Inversion filter coefficients
First interpolation filter
Lower Upper Value
H(1) H(9) 2
H(2) H(8) 4
H(3) H(7) 10
H(4) H(6) 35
H(5) - 401