User manual
NXP Semiconductors
UM10663
NXP Reader Library User Manual
UM10663
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User Manual
COMPANY PUBLIC
Rev. 1.2 — 24 July 2013
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7 of 47
ISO/IEC18000-3m3[10]: The ISO 18000-3 mode 3/EPC Class-1 HF standard allows the
commercialized provision of mass adoption of HF RFID technology for passive smart
tags and labels.
applications are supply chain management and logistics for worldwide use.
ISO/IEC18092 Mode Passive Initiator[12]: the DEP protocol as well as the passive
communication mode
Felicia: compliant protocol[11], parts of it are also part of ISO 18092[12]
This document is focused on description of MIFARE Classic card which is compliant to
the ISO/IEC14443-3A protocol. The protocol layer ensures software functionality of
specified procedures: RequestA, Activate, Anti-collision, Select, HaltA, WakeUpA. The
PAL layer is software solution, how to ensure on the PC or MCU side all the procedures,
states and the states changes regarding to ISO/IEC14443-3A[9].
1.1.1.3 Hardware abstraction layer
The Hardware Abstraction Layer implements the hardware specific elements of the
reader chip. The reader chip could be considered as an additional module of MCU or PC
– connection provider between the MCU or PC and the card. From this point of view the
HAL layer is software how to utilize this module. There are many different card readers
supported by the NXP Reader Library. They differ in peripheral modules, memory
organization, command set etc or support various package of ISO protocols. According
to Fig 3 the NXP Reader Library supports two Pegoda readers and three reader chips
and their derivatives.
RD70x and RD710 Pegoda readers: contactless reader designed for an easy reader
adaptation to a PC to use these devices for test and application purposes and reference
design for new reader development based on the CLRC632 MFRC500 reader ICs
respectively.
Three major card reader chips and their derivatives:
MFRC523: MFRC522, PN512 (reader functionality)
CLRC632: MFRC500, MFRC530, MFRC531
CLRC663: MFRC631, MFRC630, SLRC610
There are several aspects that can be each reader chip considered from:
• support for card types
• support for types of ISO protocols from previous section 1.1.1.2
• support for secure access module (SAM)
• support for host communication interface
Check datasheet of particular reader chip to check if it satisfies your requirements.
Although there are some differences between these reader chips within each group also,
PCDs of one group share the same HAL layer source code – each PCD group owns a
separate folder in NxpRdbLib_PublicRelease/comps/phhalHw<readerChip>.
Functions of this layer are responsible for execution of native commands of particular
reader chip and all the management to be utilized effectively concurrently with stress on
preventing software from infinite loops. This means mainly:
• reading/writing from/into reader’s registers.