Datasheet

CBTW28DD14 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 6 — 25 July 2014 9 of 13
NXP Semiconductors
CBTW28DD14
14-bit bus switch/multiplexer for DDR2/DDR3/DDR4 applications
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
14. Abbreviations
MSL: Moisture Sensitivity Level
Fig 5. Temperature profiles for large and small components
001aac844
temperature
time
minimum peak temperature
= minimum soldering temperature
maximum peak temperature
= MSL limit, damage level
peak
temperature
Table 11. Abbreviations
Acronym Description
CDM Charged-Device Model
CMOS Complementary Metal-Oxide Semiconductor
DDR2 Double Data Rate 2
DDR3 Double Data Rate 3
DDR4 Double Data Rate 4
DRAM Dynamic Random Access Memory
ESD ElectroStatic Discharge
FET Field-Effect Transistor
HBM Human Body Model
I/O Input/Output
MT/s Mega Transfers per second
POD_12 1.2 V Pseudo Open Drain interface
SSTL_12 Stub Series Terminated Logic for 1.2 V
SSTL_135 Stub Series Terminated Logic for 1.35 V
SSTL_15 Stub Series Terminated Logic for 1.5 V
SSTL_18 Stub Series Terminated Logic for 1.8 V