Datasheet
ADC1213D_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 9 June 2011 17 of 42
NXP Semiconductors
ADC1213D series
Dual 12-bit ADC; serial JESD204A interface
Figure 11 to Figure 14 illustrate how to connect the SENSE and VREF pins to select the
required reference voltage source.
11.2.2 Programmable full-scale
The full-scale is programmable between 1 V (p-p) to 2 V (p-p) (see Table 11).
11.2.3 Common-mode output voltage (V
O(cm)
)
An 0.1 F filter capacitor should be connected between the pins VCMA and VCMB and
ground to ensure a low-noise common-mode output voltage. When AC-coupled, these
pins can be used to set the common-mode reference for the analog inputs, for instance
via a transformer middle point.
Fig 11. Internal reference, 2 V (p-p) full-scale Fig 12. Internal reference, 1 V (p-p) full-scale
Fig 13. External reference, 1 V (p-p) to 2 V (p-p)
full-scale
Fig 14. Internal reference via SPI, 1 V (p-p) to 2 V (p-p)
full-scale
330 pF
VREF
SENSE
005aaa116
REFERENCE
EQUIVALENT
SCHEMATIC
330
pF
005aaa117
VREF
SENSE
REFERENCE
EQUIVALENT
SCHEMATIC
0.1 μF
VDDA
V
005aaa119
VREF
SENSE
REFERENCE
EQUIVALENT
SCHEMATIC
REFERENCE
EQUIVALENT
SCHEMATIC
330 pF
005aaa118
VREF
SENSE
Table 11. Programmable full-scale
INTREF[2:0] Level (dB) Full-scale (V (p-p))
000 0 2
001 11.78
010 21.59
011 31.42
100 41.26
101 51.12
110 61
111 not used x