Datasheet

ADC1212D_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 4 March 2011 22 of 42
NXP Semiconductors
ADC1212D series
Dual 12-bit ADC: CMOS or LVDS DDR digital outputs
11.3.2 Programmable full-scale
The full-scale is programmable between 1 V (p-p) to 2 V (p-p) (see Table 13).
11.3.3 Common-mode output voltage (V
O(cm)
)
A 0.1 F filter capacitor should be connected between pin VCMA/VCMB and ground to
ensure a low-noise common-mode output voltage. When AC-coupled, pin VCMA/VCMB
can then be used to set the common-mode reference for the analog inputs, for instance
via a transformer middle point.
Fig 21. Internal reference, 2 V (p-p) full-scale Fig 22. Internal reference, 1 V (p-p) full-scale
Fig 23. External reference, 1 V (p-p) to 2 V (p-p)
full-scale
Fig 24. Internal reference via SPI, 1 V (p-p) to 2 V (p-p)
full-scale
330 pF
VREF
SENSE
005aaa116
REFERENCE
EQUIVALENT
SCHEMATIC
330
pF
005aaa117
VREF
SENSE
REFERENCE
EQUIVALENT
SCHEMATIC
0.1 μF
VDDA
V
005aaa119
VREF
SENSE
REFERENCE
EQUIVALENT
SCHEMATIC
REFERENCE
EQUIVALENT
SCHEMATIC
330 pF
005aaa118
VREF
SENSE
Table 13. Programmable full-scale
INTREF Level (dB) Full-scale (V (p-p))
000 0 2
001 11.78
010 21.59
011 31.42
100 41.26
101 51.12
110 61
111 reserved x