Datasheet

ADC1212D_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 4 March 2011 16 of 42
NXP Semiconductors
ADC1212D series
Dual 12-bit ADC: CMOS or LVDS DDR digital outputs
(1) T
amb
= 40 C/typical supply voltages
(2) T
amb
=+25C/typical supply voltages
(3) T
amb
=+90C/typical supply voltages
(1) T
amb
= 40 C/typical supply voltages
(2) T
amb
=+25C/typical supply voltages
(3) T
amb
=+90C/typical supply voltages
Fig 11. SFDR as a function of duty cycle () Fig 12. SNR as a function of duty cycle ()
δ (%)
10 907030 50
001aam617
84
88
92
SFDR
(dBc)
80
(1)
(2)
(3)
δ (%)
10 907030 50
001aam618
40
60
80
SNR
(dBFS)
20
(1)
(2)
(3)
Fig 13. SFDR as a function of common-mode input
voltage (V
I(cm)
)
Fig 14. SNR as a function of common-mode input
voltage (V
I(cm)
)
V
I(cm)
(V)
3.52.50.5 3.02.01.00 1.5
001aam659
78
74
86
82
90
SFDR
(dBc)
70
V
I(cm)
(V)
3.52.50.5 3.02.01.00 1.5
001aam660
69
67
73
71
75
SNR
(dBFS)
65