Datasheet

NXP Semiconductors
Quick start ADC1415S, ADC1215S, ADC1115S, ADC1015S series (F1 or
F2 versions)
Quick start
© NXP B.V. 2011. All rights reserved. © NXP B.V. 2011. All rights reserved.
Quick start Rev. 5 — January 2011 7 of 28
1.6 Output signals in LVDS DDR version
The digital output signal is available in binary, 2’s complement or gray format.
A Data Valid Output clock (DAV) is provided by the device for the data acquisition.
Table 4. Output signals
Name Function View
J7 Samtec QTH connector – ADC digital output (D0 to D1x)
and Data Valid (DAV)
J7