Datasheet

NXP Semiconductors
Quick start
Quick start ADC1415S, ADC1215S, ADC1115S, ADC1015S series (F1
or F2 versions)
Quick start
Rev. 5 — January 2011
13 of
28
3.2 ADC1415S, ADC1215S, ADC1115S, ADC1015S setup LVDS/DDR outputs
The figure 24 below shows an overview of the whole system ADC1x15S+HSDC extension module with CMOS outputs configuration for which
connection is straightforward, together with a supply extension module (release A) for the ADC1x15S demo-board:
Fig 6. Evaluation set-up measurement with ADC1x15S CMOS and HSDC extension module
USB
SPI
MODULE
P
RESENTED CONFIGURATION
. Single-ended clock on CLKP
. 2V
pp
input full scale
. Binary CMOS outputs
C
LOCK SIGNAL
. E.g. 122.88MHz
CLOCK
GENERATOR
R
EFERENCE SIGNAL
. E.g. 170MHz
SIGNAL
GENERATOR
+5V
POWER
SUPPLY
. I =
3.2
A
USB
SPI
MODULE
+5V
POWER SUPPLY
. I = 3.2A