Datasheet

ADC1113D125 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 10 February 2011 6 of 41
NXP Semiconductors
ADC1113D125
Dual 11-bit ADC; serial JESD204A interface
9. Static characteristics
Table 5. Static characteristics
[1]
Symbol Parameter Conditions Min Typ Max Unit
Supplies
V
DDA
analog supply voltage 2.85 3.0 3.4 V
V
DDD
digital supply voltage 1.65 1.8 1.95 V
I
DDA
analog supply current f
clk
= 125 Msps;
f
i
=70MHz
-343- mA
I
DDD
digital supply current f
clk
= 125 Msps;
f
i
=70MHz
-150- mA
P
tot
total power dissipation f
clk
= 125 Msps - 1270 - mW
P power dissipation Power-down mode - 30 - mW
Standby mode - 200 - mW
Clock inputs: pins CLKP and CLKM (AC-coupled)
Low-Voltage Positive Emitter-Coupled Logic (LVPECL)
V
i(clk)dif
differential clock input
voltage
peak-to-peak - ±1.6 - V
SINE
V
i(clk)dif
differential clock input
voltage
peak-to-peak - ±3.0 - V
Low Voltage Complementary Metal Oxide Semiconductor (LVCMOS)
V
IL
LOW-level input voltage - - 0.3V
DDA
V
V
IH
HIGH-level input voltage 0.7V
DDA
-- V
Logic inputs, Power-down: pins CFG0 to CFG3, SCRAMBLER, SWING_0, SWING_1, and RESET
V
IL
LOW-level input voltage - 0 - V
V
IH
HIGH-level input voltage - 0.66V
DDD
-V
I
IL
LOW-level input current −6- +6 μA
I
IH
HIGH-level input current −30 - +30 μA
SPI: pins CS
, SDIO, and SCLK
V
IL
LOW-level input voltage 0 - 0.3V
DDA
V
V
IH
HIGH-level input voltage 0.7V
DDA
-V
DDA
V
I
IL
LOW-level input current −10 - +10 μA
I
IH
HIGH-level input current −50 - +50 μA
C
I
input capacitance - 4 - pF