Datasheet

ADC1113D125 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 10 February 2011 16 of 41
NXP Semiconductors
ADC1113D125
Dual 11-bit ADC; serial JESD204A interface
Figure 11 to Figure 14 illustrate how to connect the SENSE and VREF pins to select the
required reference voltage source.
11.2.2 Programmable full-scale
The full-scale is programmable between 1 V (p-p) to 2 V (p-p) (see Table 11).
Fig 11. Internal reference, 2 V (p-p) full-scale Fig 12. Internal reference, 1 V (p-p) full-scale
Fig 13. External reference, 1 V (p-p) to 2 V (p-p)
full-scale
Fig 14. Internal reference via SPI, 1 V (p-p) to 2 V (p-p)
full-scale
330 pF
VREF
SENSE
005aaa11
6
REFERENCE
EQUIVALENT
SCHEMATIC
330
pF
005aaa11
7
VREF
SENSE
REFERENCE
EQUIVALENT
SCHEMATIC
0.1 μF
VDDA
V
005aaa11
9
VREF
SENSE
REFERENCE
EQUIVALENT
SCHEMATIC
REFERENCE
EQUIVALENT
SCHEMATIC
330 pF
005aaa11
8
VREF
SENSE
Table 11. Programmable full-scale
INTREF[2:0] Level (dB) Full-scale (V (p-p))
000 0 2
001 −11.78
010 −21.59
011 −31.42
100 −41.26
101 −51.12
110 −61
111 not used x