Datasheet

ADC1113D125 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 10 February 2011 15 of 41
NXP Semiconductors
ADC1113D125
Dual 11-bit ADC; serial JESD204A interface
If bit INTREF_EN is set to logic 0, the reference voltage is determined either internally or
externally as detailed in Table 10
.
Fig 10. Reference equivalent schematic
Table 10. Reference modes
Mode SPI Bit, “Internal
reference”
SENSE pin VREF pin Full-scale
(V (p-p))
Internal (Figure 11
) 0 GND 330 pF capacitor
to GND
2
Internal (Figure 12
) 0 VREF pin = SENSE pin and
330 pF capacitor to GND
1
External (Figure 13
)0 V
DDA
external voltage
from 0.5 V to 1 V
1 to 2
Internal, SPI mode
(Figure 14
)
1 VREF pin = SENSE pin and
330 pF capacitor to GND
1 to 2
EXT_ref
EXT_ref
001aan670
REFAT/
REFBT
REFAB/
REFBB
SENSE
VREF
SELECTION
LOGIC
BANDGAP
REFERENCE
ADC CORE
BUFFER
REFERENCE
AMP