Datasheet

ADC1113D125 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 10 February 2011 14 of 41
NXP Semiconductors
ADC1113D125
Dual 11-bit ADC; serial JESD204A interface
The configuration shown in Figure 9 is recommended for high frequency applications. In
both cases, the choice of transformer is a compromise between cost and performance.
11.2 System reference and power management
11.2.1 Internal/external reference
The ADC1113D125 has a stable and accurate built-in internal reference voltage to adjust
the ADC full-scale. This reference voltage can be set internally via SPI or with pins VREF
an SENSE (see Figure 11
to Figure 14), in 1 dB steps between 0 dB and −6 dB, via SPI
control bits INTREF[2:0] (when bit INTREF_EN = logic 1; see Table 21
). The equivalent
reference circuit is shown in Figure 10
. An external reference is also possible by providing
a voltage on pin VREF as described in Figure 13
.
Fig 9. Dual transformer configuration
005aaa07
1
100 nF
100 nF
100 nF
100 nF
12 Ω
12 Ω
8.2 pF
50 Ω
50 Ω
50 Ω
50 Ω
ADT1-1WTADT1-1WT
Analog
input
INAP
INBP
INAM
VCM
INBM