Datasheet

ADC1113D125 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 10 February 2011 11 of 41
NXP Semiconductors
ADC1113D125
Dual 11-bit ADC; serial JESD204A interface
10.4 SPI timing
[1] Typical values measured at V
DDA
=3V, V
DDD
=1.8V, T
amb
=25°C and C
L
= 5 pF. Minimum and maximum
values are across the full temperature range T
amb
= −40 °C to +85 °C at V
DDA
=3V, V
DDD
=1.8V;
V
I
(INAP, INBP) − V
I
(INAM,INBM) = −1 dBFS; internal reference mode; 100 Ω differential applied to serial
outputs; unless otherwise specified.
Fig 4. Eye diagram at 2 V receiver common-mode
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9
Table 8. SPI timing characteristics
[1]
Symbol Parameter Conditions Min Typ Max Unit
Serial Peripheral Interface timing
t
w(SCLK)
SCLK pulse width - 40 - ns
t
w(SCLKH)
SCLK HIGH pulse
width
-16- ns
t
w(SCLKL)
SCLK LOW pulse
width
-16- ns
t
su
set-up time data to SCLK H - 5 - ns
CS
to SCLK H - 5 - ns
t
h
hold time data to SCLK H - 2 - ns
CS
to SCLK H - 2 - ns
f
clk(max)
maximum clock
frequency
-25- MHz
Fig 5. SPI timing
t
su
SDIO
SCLK
R/W
W1
W0 A12 A11 D2 D1
D0
t
su
t
h
t
h
t
w(SCLK)
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5
CS
t
w(SCLKL)
t
w(SCLKH)