Datasheet

NXP Semiconductors Quick start ADC1412D, ADC1212D, ADC1112D series
Quick start
QS_ADC1412D_10.doc
©
NXP B.V.
2010
. All rights reserved.
Quick start Rev. 10 — 17 December 2010 7 of 27
1.6 Output signals (DA0 to DA13, DB0 to DB13, OTRA, DAV)
The digital output signal is available in binary, 2’s complement or gray format.
A Data Valid Output clock (DAV) is provided by the device for the data acquisition.
Table 3. Output signals
Name Function View
J5 Array connector – ADC A digital output(DA0 to DA13),
Out of range signal (OTRA)
J6 Array connector – ADC B digital output(DB0 to DB13) and
Data Valid (DAV)
1.7 SPI Mode
The ADC1412D can be controlled either by a Serial Peripheral Interface (SPI) or by PIN.
Table 4. SPI Interface
Name Function View
J9 Array connector – SPI daughter board interface (for
debug only)
J10 USB connector – SPI daughter board interface
1.8 SPI program
For more details on how to control device with SPI, refer to section 3.3.
J6
J5
J9
J10
J9
J10