Datasheet

NXP Semiconductors Quick start ADC1412D, ADC1212D, ADC1112D series
Quick start
QS_ADC1412D_10.doc
©
NXP B.V.
2010
. All rights reserved.
Quick start Rev. 10 — 17 December 2010 6 of 27
N
M
F
F
s
in
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1.4 Power supply
The board is powered with a 3 V
DC
and 1.8/3 V
DC
power supplies. A power supply
regulator is used to supply all the circuitry on the board.
Table 1. General power supply
Name Function View
J8 +3 V green connector – Power supply 3 V
DC
/ 400 mA.
J7 +1.8 V green connector – Power supply 1.8 V
DC
/ 100 mA
TP1 AGND test point – Digital ground
TP2 DGND test point – Analog ground
1.5 Input signals (IN, CLK)
The input clock signal can be either a sinewave or a LVCMOS signal.
To ensure a good evaluation of the device, the input signal and the input clock must be
synchronized together.
Moreover, the input frequency (Fi, MHz) and the clock frequency (Fclk, Msps) should
follow the formula, known as coherency criteria for FFT processing (see section 3.3.6
and appendix A.1):
where M is an odd number of period and N is the number of samples.
Table 2. Input signals
Name Function View
J1 IN A connector – Analog input signal ( 50 Ω matching)
J2 CLKP connector – Single ended clock input signal ( 50 Ω
matching), with a transformer.
J3 CLKN connector – Grounded on that demoboard
J4 IN B connector – Analog input signal ( 50 Ω matching)
J8
J7
TP2
TP1
J1
J2
J3
J4